VP0550N3-G SUTEX | Alldatasheet

Document overview

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Technical content

Features

► Free from secondary breakdown ► Low power drive requirement ► Ease of paralleling ► Low CISS and fast switching speeds ► High input impedance and high gain ► Excellent thermal stability ► Integral source-to-drain diode

Applications

► Motor controls ► Converters ► Amplifiers ► Switches ► Power supply circuits ► Drivers (relays, hammers, solenoids, lamps, memories, displays, bipolar transistors, etc.) General Description The Supertex VP0550 is an enhancement-mode (normally- off) transistor that utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors, and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Pin Configuration P-Channel Enhancement-Mode Vertical DMOS FETs GATE SOURCE DRAIN Product Marking YY = Year Sealed WW = Week Sealed = “Green” Packaging SiVP 0550 YYWW TO-92 (N3) TO-92 (N3) Package may or may not include the following marks: Si or Absolute Maximum Ratings Parameter Value Drain-to-source voltage BVDSS Drain-to-gate voltage BVDGS Gate-to-source voltage ±20V Operating and storage temperature -55°C to +150°C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground.

Ordering Information

Package Wafer / Die Options TO-92 NW (Die in wafer form) NJ (Die on adhesive tape) ND (Die in waffle pack) VP0550 VP0550N3-G VP1550NW VP1550NJ VP1550ND For packaged products, -G indicates package is RoHS compliant (‘Green’). Devices in Wafer / Die form are RoHS compliant (‘Green’). Refer to Die Specification VF15 for layout and dimensions. Product Summary Device BVDSS/BVDGS (V) RDS(ON) (max) (Ω) ID(ON) (min) (mA) VP0550N3-G -500 125 -100

Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com Electrical Characteristics (TA = 25°C unless otherwise specified) Sym Parameter Min Typ Max Units Conditions BVDSS Drain-to-source breakdown voltage -500 - - V VGS = 0V, ID = -1.0mA VGS(th) Gate threshold voltage -2.0 - -4.5 V VGS = VDS, ID = -1.0mA ΔVGS(th) Change in VGS(th) with temperature - 3.5 6.0 mV/OC VGS = VDS, ID = -1.0mA IGSS Gate body leakage current - - -100 nA VGS = ±20V, VDS = 0V IDSS Zero gate voltage drain current - - -10 µA VGS = 0V, VDS = Max Rating - - -1000 VDS = 0.8 Max Rating, VGS = 0V, TA = 125OC ID(ON) On-state drain current - -90 - mA VGS = -5.0V, VDS = -25V -100 -240 - VGS = -10V, VDS = -25V RDS(ON) Static drain-to-source on-state resis- tance - 85 - Ω VGS = -5.0V, ID = -5mA - 80 125 VGS = -10V, ID = -10mA ΔRDS(ON) Change in RDS(ON) with temperature - 0.85 - %/OC VGS = -10V, ID = -10mA GFS Forward transconductance 25 40 - mmho VDS = -25V, ID = -10mA CISS Input capacitance - 40 70 pF VGS = 0V, VDS = -25V, f = 1.0MHz COSS Common source output capacitance - 10 20 CRSS Reverse transfer capacitance - 3.0 10 td(ON) Turn-on delay time - 5.0 10 ns VDD = -25V, ID = -100mA, RGEN = 25Ω tr Rise time - 8.0 10 td(OFF) Turn-off delay time - 8.0 15 tf Fall time - 5.0 16 VSD Diode forward voltage drop - -0.8 -1.5 V VGS = 0V, ISD = -0.1A trr Reverse recovery time - 200 - ns VGS = 0V, ISD = -0.1A Notes: 2. All A.C. parameters sample tested. Switching Waveforms and Test Circuit Thermal Characteristics Package ID (continuous)† (mA) ID (pulsed) (mA) Power Dissipation @TC = 25OC (W) θjc (OC/W) θja (OC/W) IDR (mA) IDRM (mA) TO-92 -54 -250 1.0 125 170 -54 -250 Notes: † ID (continuous) is limited by max rated Tj . 90% 10% 90% 90% 10% 10% Pulse Generator VDD RL Output D.U.T. t(ON) td(ON) t(OFF) td(OFF) tf tr INPUT INPUT OUTPUT VDD RGEN -10V

Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com Typical Performance Curves Output Characteristics 0 -10 -20 -30 -40 -50 Saturation Characteristics 0 -2 -4 -6 -8 -10 Maximum Rated Safe Operating Area -1 -10 -100 -1000 Thermal Response Characteristics Thermal Resistance (normalized) 1.0 0.8 0.6 0.4 0.2 Transconductance vs. Drain Current 100 GFS (millisiemens) Power Dissipation vs. Case Temperature 0 25 50 75 100 125 150 -100 -80 -60 -40 -20 0.001 0.01 0.1 1.0 10 TA = -55OC VGS = -10V VGS = -10V -5V -8V -1.0 -0.1 -0.01 -0.001 2.0 1.0 -0.5 -0.4 -0.3 -0.2 -0.1 -7V -6V -5V -4V -8V -6V TO-92(DC) PD = 1.0W TC = 25OCTC = 25OC VDS (volts) ID (amperes) ID (milliamps) VDS (volts) ID (amperes) TC (OC) PD (watts) VDS = -25V VDS (volts) tP (seconds) 25OC 150OC ID (amperes)

Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com Typical Performance Curves (cont.) Gate Drive Dynamic Characteristics On-Resistance vs. Drain Current Transfer Characteristics Capacitance vs. Drain-to-Source Voltage C (picofarads) 0 -10 -20 -30 -40 -50 0 50 100 150 1.15 1.10 1.05 1.00 0.95 0.90 -0.4 -0.2 f = 1MHz -10 83pF 30pF 200 160 120 V(th) @ -1.0mA RDS(ON) @ -10V, -10mA 1.10 1.05 1.00 0.95 0.90 0.85 2.0 1.6 1.2 0.8 0.4 RDS(ON) (ohms) BVDSS (normalized) Tj (OC) ID (amperes) BVDSS Variation with Temperature VGS = -5V VGS = -10V VGS(th) (normalized) V(th) and RDS Variation with Temperature VGS (volts) ID (amperes) RDS(ON) (normalized) VDS = -25V TA = -55OC CISS COSS CRSS QG (nanocoulombs) VGS (volts) VDS (volts) VDS = -40V VDS = -10V Tj (OC) TA = 25OC TA = 150OC -50 0 50 100 150

Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such appl ications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) ©2011 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Supertex inc.

1235 Bordeaux Drive, Sunnyvale, CA 94089

Tel: 408-222-8888 www.supertex.com VP0550 (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Doc.# DSFP-VP0550 B030411 3-Lead TO-92 Package Outline (N3) Symbol A b c D E E1 e e1 L Dimensions (inches) JEDEC Registration TO-92. * This dimension is not specified in the JEDEC drawing. † This dimension differs from the JEDEC drawing. Drawings not to scale. Supertex Doc.#: DSPD-3TO92N3, Version E041009. Seating Plane Front View Side View Bottom View E D L e c 1 2 3 b A