VP02C SUTEX | Alldatasheet
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. VP02C Supertex inc. T-39-/9 ® P-Channel Enhancement-Mode Vertical DMOS Power FETs
Ordering Information
BV oss / Rogiony Order Number / Package BV eos (max) 70-39 10-92 70-220 Features Advanced DMOS Technology Freedom from secondary breakdown These enhancement-mode (normally-off) power transistors util- . ize a vertical DMOS structure and Supertex's well-proven silicon- 1 Low power drive requirement gate manufacturing process. This combination produces devices C1 Ease of paralleling with the power handling capabilities of bipolar transistors and with the high input impedance and negative temperature coefficient 4 Low C,., and fast switching speeds inherent in MOS devices, Characteristic of all MOS structures, these devices are free from thermal runaway and thermally- © Excellent thermal stablity induced secondary breakdown. A 01 Integral Source-Drain diode ‘Supertex Vertical DMOS Power FETs are ideally suited toa wide ii 1 High input impedance and high gain Tange of switching and amplifying applications where high break- down voltage, high input impedance, low input capacitance, and © Complementary N- and P-Channel devices fast switching speeds are desired. : Applications Package Options (Note 1) £ © Motor contro! : D Convertors : O Amplifiers O Switches © Power supply circuits Hi © Driver (Relays, Hammers, Solenoids, Lamps, i Memories, Displays, Bipolar Transistors, etc.) 0-92 L :. Absolute Maximum Ratings ii f Drain-to-Source Voltage BVo55 0.39 ro200 \\ Drain-to-Gate Voltage BV cos \\ Gate-to-Source Voltage £20V I, Operating and Storage Temperature “55°C to +150°C ki Soldering Temperature" ‘300°C Note 1: See Package Outine section for scrote pinous. | “Distance of 1.6 mm from case for 10 saconds. L 9-17
SUPERTEX INC Oo. De Bpaz73ess 0001700 1 | | 7 = . ‘VP02C Thermal Characteristics 39-/9 1, (continuous)* Power Dissipation @T, = 25°C 0-39 [-oasa | toa] aw ge 5 -o.a5a | 1.00 | ' [rose | oan] soa | tw tas toon [aon | * Ip (continuous i timited by max rated T, Electrical Characteristics (@ 25°C unless otherwise specified) (Notes 1 and 2) . [_symbor [Parameter min | tye [Mex [unt [Conditions | By, Drain-to-Source Gate Threshold Voltage [ 10 [Of 38 [OV] Vos= Vos: tp = 2.5mA Change in Vesa with Temperature i | Toss [Gato Body Leakage || 100 [AT V5 = 320V, Vg = 0 Zero Gate Voltage Drain Current [25 [WA | Vog=0, Voy = Max Rating Vag = 0. Vos = 0.8 Max Rating T= 125°C ‘ON-State Drain Current [-025 [04 | Vos = “BV. Vog = -28V [275 [085 | Weg = 10, Vp= 250 . Rosiom | Static Drain-to-Source [9 | 16 | Vos = “BV. lp = 0.1 ON-State Resistance | 7] | Vag = “10V, | = -0.25A [S| Forward Tanscendutance [on [oa [| 8 | Vagn @8¥iip = 025A | Css | Input Capacitance re Vi. #0, V. = 28V Common Source Output Capacitance |_| 60 | 85 | time . Reverse Transfer Capacitance [10 | 35 | - [uc | Tu ON Doay Tine Do} [use| Tun-oFF Baay Tine [| [2 | etoe [4 | FallTime || to fs | Lt, | Reverse Recovery Time [400 Ts TVs = 0s bgp = 0.5K] ‘Note 1; All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: S00us pulse, 2% duty cycle.) Note 2: AAC. paramtars sample tasted. Switching Waveforms and Test Circuit Yoo 0% ry Anput 210%. puss Nor | GENERATOR | Score | 1 i Dut. . i ovo ! | soa 10%" 10% 1 ! i + cord fore | ee ¥ | 9-18 |
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SUPERTEX INC o1 Dep arzaess g001702 5 i vP02C 4 7-39-79 BVDSS Variation with Temperature ON-Resistance Vs. Drain Current 1 “CTTTTTrr4 “CTT TT og peed ETT a “LETT TTT to — LEEEEP Pr ee A ae g LTT TT try eo Aa & {ttt ry re 8 PC gL eT é [Ty | vos=Srovf” || a COUCH EerT 0.9 \\7 [te a Yee TT oo Oe sO LET F Tac) Ips (AMPERES) si ‘Transfer Characteristics ‘V(th) and RDS Variation with Temperature i “ves TTT TIT] (TTT TTT Ty” a COC eT] oe fe OT ae] gE uLt ter) g LLL YY 5 Cw [A 2 B of tt A ee PRea4 Tr, : ft ee ee ae a © PLEA 2 “ETT res) 3 COO 8 errr 6+ CS CDA a a | lA TTT a LE LEPC 4 Bi . Capacitance Vs. Drain-to-Source Voltage Gate Drive Dynamic Characteristics H 1 160 ~10 1 a a P| | OSaUEyy, “ CI { p NO po | < 2 [feos ° 10 20 30 40 6 “1 -2 Vos (VOLTS) ‘Qg (NANOCOULOMBS) 9-20