VP0104N3-G SUTEX | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 5

Technical content

Features

► Free from secondary breakdown ► Low power drive requirement ► Ease of paralleling ► Low CISS and fast switching speeds ► High input impedance and high gain ► Excellent thermal stability ► Integral source-to-drain diode

Applications

► Motor controls ► Converters ► Amplifiers ► Switches ► Power supply circuits ► Drivers (relays, hammers, solenoids, lamps, memories, displays, bipolar transistors, etc.) General Description The Supertex VP0104 is an enhancement-mode (normally- off) transistor that utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors, and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Absolute Maximum Ratings Parameter Value Drain-to-source voltage BVDSS Drain-to-gate voltage BVDGS Gate-to-source voltage ±20V Operating and storage temperature -55°C to +150°C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Pin Configuration P-Channel Enhancement-Mode Vertical DMOS FETs GATE SOURCE DRAIN Product Marking YY = Year Sealed WW = Week Sealed = “Green” Packaging SiVP 0104 YYWW TO-92 (N3) TO-92 (N3) Package may or may not include the following marks: Si or

Ordering Information

Package Wafer / Die Options TO-92 NW (Die in wafer form) NJ (Die on adhesive tape) ND (Die in waffle pack) VP0104 VP0104N3-G VP1504NW VP1504NJ VP1504ND For packaged products, -G indicates package is RoHS compliant (‘Green’). Devices in Wafer / Die form are RoHS compliant (‘Green’). Refer to Die Specification VF15 for layout and dimensions. Product Summary Device BVDSS/BVDGS (V) RDS(ON) (max) (Ω) ID(ON) (min) (mA) VP0104N3-G -40 8.0 -500

Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com Electrical Characteristics (TA = 25°C unless otherwise specified) Sym Parameter Min Typ Max Units Conditions BVDSS Drain-to-source breakdown voltage -40 - - V VGS = 0V, ID = -1.0mA VGS(th) Gate threshold voltage -1.5 - -3.5 V VGS = VDS, ID = -1.0mA ΔVGS(th) Change in VGS(th) with temperature - 5.8 6.5 mV/OC VGS = VDS, ID = -1.0mA IGSS Gate body leakage current - -1.0 -100 nA VGS = ±20V, VDS = 0V IDSS Zero gate voltage drain current - - -10 µA VGS = 0V, VDS = Max Rating - - -1.0 mA VDS = 0.8 Max Rating, VGS = 0V, TA = 125OC ID(ON) On-state drain current -0.15 -0.25 - A VGS = -5.0V, VDS = -25V RDS(ON) Static drain-to-source on-state resistance - 11 15 Ω VGS = -5.0V, ID = -100mA - 6.0 8.0 VGS = -10V, ID = -500mA ΔRDS(ON) Change in RDS(ON) with temperature - 0.55 1.0 %/OC VGS = -10V, ID = -500mA GFS Forward transconductance 150 190 - mmho VDS = -25V, ID = -500mA CISS Input capacitance - 45 60 pF VGS = 0V, VDS = -25V, f = 1.0MHz COSS Common source output capacitance - 22 30 CRSS Reverse transfer capacitance - 3.0 8.0 td(ON) Turn-on delay time - 4.0 6.0 ns VDD = -25V, ID = -500mA, RGEN = 25Ω tr Rise time - 3.0 10 td(OFF) Turn-off delay time - 8.0 12 tf Fall time - 4.0 10 VSD Diode forward voltage drop - -1.2 -2.0 V VGS = 0V, ISD = -1.0A trr Reverse recovery time - 400 - ns VGS = 0V, ISD = -1.0A Notes: 2. All A.C. parameters sample tested. Switching Waveforms and Test Circuit Thermal Characteristics Package ID (continuous)† (mA) ID (pulsed) (mA) Power Dissipation @TC = 25OC (W) θjc (OC/W) θja (OC/W) IDR (mA) IDRM (mA) TO-92 -250 -800 1.0 125 170 -250 -800 Notes: † ID (continuous) is limited by max rated Tj . 90% 10% 90% 90% 10% 10% Pulse Generator VDD RL Output D.U.T. t(ON) td(ON) t(OFF) td(OFF) tf tr INPUT INPUT OUTPUT VDD RGEN -10V

Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com Typical Performance Curves Transconductance vs. Drain Current ID (amperes) GFS (millisiemens) 250 200 150 100 TA = 125OC TA = 25OC TA = -55OC VDS = -25V Maximum Rated Safe Operating Area ID (amperes) -0.1 -1.0 -10 -100 VDS (volts) -10 -1.0 -0.1 -0.01 TO-92 (DC) TC = 25OC Output Characteristics ID (amperes) 0 -10 -20 -30 -40 -2.0 -1.6 -1.2 -0.8 -0.4 VDS (volts) VGS = -10V -8V -4V -6V Saturation Characteristics ID (amperes) -1.0 -0.8 -0.6 -0.4 -0.2 VDS (volts) 0 25 50 75 100 125 150 Power Dissipation vs. Case Temperature 2.0 1.0 TO-92 PD (watts) TC (OC) Thermal Response Characteristics 0.001 0.01 0.1 1.0 10 1.0 0.8 0.6 0.4 0.2 TO-92 PD = 1W TC = 25OC tP (seconds) Thermal Resistance (normalized) -5V -7V -9V VGS = -10V -8V -4V -6V -5V -7V -9V 0 -2 -4 -6 -8 -10

Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com Typical Performance Curves (cont.) BVDSS Variation with Temperature BVDSS (normalized) 1.10 1.06 1.02 0.98 0.94 0.90 -50 0 50 100 150 Tj (OC) Transfer Characteristics On-Resistance vs. Drain Current RDS(ON) (ohms) ID (amperes) VGS = -5.0V VGS = -10V -1.0 -0.8 -0.6 -0.4 -0.2 0 -2 -4 -6 -8 -10 VGS (volts) VDS = -25V TA = -55OC TA = 25OC TA = 125OC VDS = -10V VDS = -40V70pf 70pf -50 0 50 100 150 -1.6 -1.4 -1.2 -1.0 -0.8 0.6 V(th) and RDS Variation with Temperature Capacitance vs. Drain-to-Source Voltage Gate Drive Dynamic Characteristics VDS (volts) 0 -10 -20 -30 -40 -10 VGS(th) (normalized)VGS (volts) C (picofarads) 100 f = 1MHz CISS COSS CRSS -1.6 -1.4 -1.2 -1.0 -0.8 RDS(ON) (normalized) RDS(ON) @ 10V, -0.5A RDS(ON) @ -5V, -0.1A V(th) @ -1.0mA QG (nanocoulombs) 45pf Tj (OC)

Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such appl ications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) ©2011 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Supertex inc.

1235 Bordeaux Drive, Sunnyvale, CA 94089

Tel: 408-222-8888 www.supertex.com VP0104 (The package drawing (s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Doc.# DSFP-VP0104 B062211 3-Lead TO-92 Package Outline (N3) Symbol A b c D E E1 e e1 L Dimensions (inches) JEDEC Registration TO-92. * This dimension is not specified in the JEDEC drawing. † This dimension differs from the JEDEC drawing. Drawings not to scale. Supertex Doc.#: DSPD-3TO92N3, Version E041009. Seating Plane Front View Side View Bottom View E D L e c 1 2 3 b A