DATASHEET SEARCH SITE | WWW.ALLDATASHEET.COM

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 6

Technical content

Features

► Free from secondary breakdown ► Low power drive requirement ► Ease of paralleling ► Low CISS and fast switching speeds ► Excellent thermal stability ► Integral source-drain diode ► High input impedance and high gain

Applications

► Motor controls ► Converters ► Amplifiers ► Switches ► Power supply circuits ► Drivers (relays, hammers, solenoids, lamps, memories, displays, bipolar transistors, etc.) N-Channel Enhancement-Mode Vertical DMOS FETs GATE SOURCE DRAIN DRAIN General Description This enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally induced secondary breakdown. Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. TO-92 (N3) YY = Year Sealed WW = Week Sealed = “Green” Packaging SiVN 3205 YYWW VN2LW W = Code for week sealed = “Green” Packaging TO-243AA (SOT-89) (N8) Package may or may not include the following marks: Si or Package may or may not include the following marks: Si or Absolute Maximum Ratings Parameter Value Drain-to-source voltage BVDSS Drain-to-gate voltage BVDGS Gate-to-source voltage ±20V Operating and storage temperature -55OC to +150OC Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Pin Configuration TO-92 (N3) GATE SOURCE DRAIN Product Marking

Ordering Information

Part Number Package Option Packing VN3205N3-G 3-Lead TO-92 1000/Bag VN3205N3-G P002 3-Lead TO-92 2000/Reel VN3205N3-G P003 VN3205N3-G P005 VN3205N3-G P013 VN3205N3-G P014 VN3205N8-G 3-Lead TO-243AA (SOT-89) 2000/Reel VN3205NW Die in wafer form --- VN3205NJ Die on adhesive tape --- VN3205ND Die in waffle pack --- Product Summary BVDSS/BVDGS (V) RDS(ON) (max) (Ω) VGS(th) (max) (V) 50 0.3 2.4 For packaged products, -G indicates package is RoHS compliant (‘Green’). TO-92 taping specifications and winding styles per EIA-468 Standard. Devices in Wafer / Die form are RoHS compliant (‘Green’). Refer to Die Specification VF32 for layout and dimensions. Typical Thermal Resistance Package θja 3-Lead TO-92 132OC/W 3-Lead TO-243AA (SOT-89) 133OC/W TO-243AA (SOT-89) (N8)

Supertex inc. www.supertex.com Doc.# DSFP-VN3205 C101612 Thermal Characteristics Package ID (continuous)* (A) ID (pulsed) (A) Power Dissipation @TC = 25OC (W) IDR † (A) IDRM (A) Notes: * ID (continuous) is limited by max rated Tj, Ta = 25OC. † Total for package. ‡ Mounted on FR5 board, 25mm x 25mm x 1.57mm. Electrical Characteristics (Tj = 25OC unless otherwise specified) Sym Parameter Min Typ Max Units Conditions BVDSS Drain-to-Source breakdown voltage 50 - - V VGS = 0V, ID = 10mA VGS(th) Gate threshold voltage 0.8 - 2.4 V VGS = VDS, ID = 10mA ΔVGS(th) Change in VGS(th) with temperature - -4.3 -5.5 mV/OC VGS = VDS, ID = 10mA IGSS Gate body leakage current - 1.0 100 nA VGS = ±20V, VDS = 0V IDSS Zero Gate voltage drain current - - 10 µA VGS = 0V, VDS = Max Rating - - 1.0 mA VDS = 0.8 Max Rating, VGS = 0V, TA = 125OC ID(ON) ON-state Drain current 3.0 14 - A VGS = 10V, VDS = 5.0V RDS(ON) Static Drain-to-Source ON-state resistance TO-92 - - 0.45 Ω V GS = 4.5V, ID = 1.5A TO-243AA - - 0.45 VGS = 4.5V, ID = 0.75A TO-92 - - 0.3 VGS = 10V, ID = 3.0A TO-243AA - - 0.3 VGS = 10V, ID = 1.5A ΔRDS(ON) Change in RDS(ON) with temperature - 0.85 1.2 %/OC VGS = 10V, ID = 3.0A GFS Forward transconductance 1.0 1.5 - mho VDS = 25V, ID = 2.0A CISS Input capacitance - 220 300 pF VGS = 0V, VDS = 25V, f = 1.0MHz COSS Common Source output capacitance - 70 120 CRSS Reverse transfer capacitance - 20 30 td(ON) Turn-on delay time - - 10 ns VDD = 25V, ID = 2.0A, RGEN = 10Ω tr Rise time - - 15 td(OFF) Turn-off delay time - - 25 tf Fall time - - 25 VSD Diode forward voltage drop - - 1.6 V VGS = 0V, ISD = 1.5A trr Reverse recovery time - 300 - ns VGS = 0V, ISD = 1.0A Notes: 2. All A.C. parameters sample tested. Switching Waveforms and Test Circuit 90% 10% 90% 90% 10%10% Pulse Generator VDD RL OUTPUT D.U.T. t(ON) td(ON) t(OFF) td(OFF)tr INPUT INPUT OUTPUT 10V VDD RGEN tf

Supertex inc. www.supertex.com Doc.# DSFP-VN3205 C101612 Typical Performance Curves 8.0 4.0 0 1.0 10 100 1.0 0.1 0.01 1.0 0.8 0.6 0.4 0.2 0.001 0.01 0.1 1.0 10 5.0 4.0 3.0 2.0 1.0 0 2.0 4.0 6.0 8.0 10 TA = -55OC 0 10 20 30 40 50 0 2.0 4.0 6.0 8.0 10 VGS = 10V TO-92 (pulsed) TO-243AA (DC) TO-92 (DC) VDS = 25V TO-243AA TA = 25OC PD = 1.6W TO-243AA (pulsed) TO-92 TC = 25OC PD = 1.0W 0 25 50 75 100 125 150 TO-243AA (TA = 25°C) TO-92 3.2 2.4 1.6 0.8 Saturation Characteristics Maximum Rated Safe Operating Area Thermal Response Characteristics Thermal Resistance (normalized) Transconductance vs. Drain Current Power Dissipation vs. Case Temperature Output Characteristics ID (amperes) VDS (volts) PD (watts) TC (OC) ID (amperes) tp (seconds) ID (amperes) VDS (volts) ID (amperes) GFS (seimens) VDS (volts) VGS = 10V 8.0 4.0 25OC 125OC TC = 25OC

Supertex inc. www.supertex.com Doc.# DSFP-VN3205 C101612 Typical Performance Curves (cont.) 0 10 20 30 40 400 300 200 100 0 2.0 4.0 6.0 8.0 10 8.0 6.0 4.0 2.0 -50 0 50 100 150 1.1 1.0 0.9 1.0 0.8 0.6 0.4 0.2 1.2 1.1 1.0 0.9 0.8 0.7 8.0 6.0 4.0 2.0 -50 0 50 100 150 325 pF VDS = 40V VGS = 4.5V TA = -55OC VDS =25V 0 4.0 8.0 12 16 20 f = 1MHz CISS COSS CRSS 215 pF 1.6 1.4 1.2 1.0 0.8 0.6 VGS(th) @ 1.0mA 25OC RDS(ON) @ 10V, 3.0A Gate Drive Dynamic Characteristics QG (nanocoulombs) VGS(th) (normalized) RDS(ON) (normalized) V(th) and RDS Variation with Temperature On-Resistance vs. Drain Current BVDSS Variation with Temperature BVDSS (normalized) Transfer Characteristics Capacitance vs. Drain-to-Source Voltage C (picofarads) ID (amperes)Tj (OC) RDSS(ON) (ohms) ID (amperes) VGS (volts) VDS (volts) VGS (volts) Tj (OC) VGS = 10V 125OC VDS = 10V

Supertex inc. www.supertex.com Doc.# DSFP-VN3205 C101612 3-Lead TO-92 Package Outline (N3) Symbol A b c D E E1 e e1 L Dimensions (inches) JEDEC Registration TO-92. * This dimension is not specified in the JEDEC drawing. † This dimension differs from the JEDEC drawing. Drawings not to scale. Supertex Doc.#: DSPD-3TO92N3, Version E041009. Seating Plane Front View Side View Bottom View E D L e c 1 2 3 b A

Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such appl ications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liabilit y to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) ©2013 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Supertex inc.

1235 Bordeaux Drive, Sunnyvale, CA 94089

Tel: 408-222-8888 www.supertex.com VN3205 (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Doc.# DSFP-VN3205 C101612 3-Lead TO-243AA (SOT-89) Package Outline (N8) Symbol A b b1 C D D1 E E1 e e1 H L Dimensions (mm) 1.50 BSC 3.00 BSC 3.94 0.73† JEDEC Registration TO-243, Variation AA, Issue C, July 1986. † This dimension differs from the JEDEC drawing Drawings not to scale. Supertex Doc. #: DSPD-3TO243AAN8, Version F111010. b b1 D E H E1 C A 1 2 3 e Top View Side View L