VN03F SUTEX | Alldatasheet

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  • SUPERTEX INC OL DE S77?3295 0001610 0 | @ Supertex inc. 7—39-// ® N-Channel Enhancement-Mode Vertical DMOS Power FETs

Ordering Information

BVo55/ Order Number / Package BVoo8 [03 [to-220 | Bice sv | en | tsa | nant VNO@3sNO [soviet vsscns__ | vnoasons | vnoaoono Features Advanced DMOS Technology © Freedom from secondary breakdown These enhancement-mode (normally-off) power transistors util- ize a vertical DMOS structure and Supertex's well-proven silicon- © Low power drive requirement ‘gate manufacturing process. This combination produces devices . © Ease of paralleling with the power handling capabilities of bipolar transistors and with : atch the high input impedance and negative temperature coefficient Low Cigg and fast switching speeds inherent in MOS devices. Characteristic of all MOS structures, © Excellent thermal stability these devices are free from thermal runaway and thermally- © Integral Source-Drain diode induced secondary breakdown. i i Supertex Vertical DMOS Power FETS are ideally suited to a wide G_ High input impedance and high gain range of switching and amplifying applications where high break- © Complementary N- and P-Channel devices down voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Applications Package Options (Note 1) uo 1D Motor contro! : O Converters ia

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©. Switches E © Power supply circuits fox O_Drivers (Relays, Hammers, Solenoids, Lamps, J —- Memories, Displays, Bipolar Transistors, etc.) Sy 7] i . To20 i ' Absolute Maximum Ratings i : Drain-to-Source Voltage BV pss | Drain-to-Gate Voltage BV as Gate-to-Source Voltage +£20V Operating and Storage Temperature -55°C to +150°C. i ‘Soldering Temperature* 300°C Note 1: See Package Outine section for discrete pinouts. 4 “Distance of 1.6 mm irom caso for 10 seconds 8-41

' SUPERTEX INC O1 ve jazzaess goo01b11 2 r VNO3F Thermal Characteristics T2394 1p (continuous)* Power Dissipation % ton | Sonu? @T, = 26°C “ow [roa | se | mm | tom | ss | m0 | ace | ee | Prone [me [me | wm [etelm| «| “Ig (continuous) Is ted by max rated T, | Electrical Characteristics (@ 25°C unless otherwise specified) (Notes 1 and 2) ee BVDSS Drain-to-Source ‘VNO36O Breakdown Voltage ‘NOSES =| V_ | Vas= 0, 1D = 10mA Vasith) | Gate Threshold Voltage | 2 [TV [Vas = vos.1p = 10ma AVGSith) | Change in VGS{th) with Temperature [| =4.8 | -6.0 | mvc | Vas = Vos, ID = 10mA | 'css_ | Gate Body Leakage TT 00 [nA | Vas =220v, Vos =0 Zero Gate Voltage Drain Current [100 | #A | VGs=0,VDS = Max Rating | VGs = 0, VDS = 0.8 Max Rating Ta = 125°C ON State Drain Current a Ee [as [30 || VGS = 10V, Vs = 25V Static Drain-to-Source [55 | | VGS = 5V, ID = 0.250 ON-State Resistance [45 | 60 | VGS = 10V, 1D = 0.54 ARDS(ON) | Change in ROS(ON) with Temperature[ [1 | | ic | VGs=10V,1D = 0.58 | Ges | Forward Transeonductancee [08 [1 [|u| Vos=26V,Ip=05A | Ciss | Input Capacitance 850680 | Coss | Common Source Output Capacitance [| 75 | 125 | TSS VOS = 28V |_Crss | Reverse Transfer Capacitance || 25 [50 | =v |_taiony | Turn-ON Delay Time | vob = 25V [ot RiseTime | 1D =0.5A talOFF) | Turn-OFF Delay Time | 65100 | Rs = 502. | Fe time a | |_Vsb | Diode ForwardVoltage Drop || .a_ | 46 | V | Vas=0iso=6a [ice ___| Reverse Recovery Time || a0 [ns | VGS= 0, 18D = 5A Note 1: AID.O. paramters 100% ested at 25°C uress otherwise slated. (Pulse lest 900s pulse, 2% diy oye) Note 2: AllA.C. parameters sample tested. Switching Waveforms and Test Circuit voo 20% RL 10%. input ——--—- : OFFI fuse 1 [GENERATOR | SCOPE output 90%: 90% { + 1 L--_--J = * = 8-42 i

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