TN5325 SUTEX | Alldatasheet
Document overview
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Technical content
Features
❏ Low threshold – 2.0V max. ❏ Free from secondary breakdown ❏ Low power drive requirement ❏ Low CISS and fast switching speeds ❏ Excellent thermal stability ❏ High input impedance and high gain ❏ Complementary N- and P-channel devices
Applications
❏ Logic level interfaces – ideal for TTL and CMOS ❏ Solid state relays ❏ Battery operated systems ❏ Photo voltaic drives ❏ Analog switches ❏ General purpose line drivers ❏ Telecom switches Advanced DMOS Technology These enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inher- ent in MOS devices. Characteristic of all MOS structures, these devices are free from thermal runaway and thermally-induced secondary breakdown. Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Note: See Package Outline section for dimensions. Package Options S G D TO-92 TO-243AA (SOT-89) G D S D TO-236AB (SOT-23) G S D Product marking for TO-243AA Where ❋ = 2-week alpha date code TN3C❋
1235 Bordeaux Drive, Sunnyvale, CA 94089
TEL: (408) 744-0100 • FAX: (408) 222-4895 www.supertex.com 11/12/01 ©2001 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited. Package I D (continuous)* I D (pulsed) Power Dissipation θjc θja IDR*I DRM @ TA = 25°C °C/W °C/W TO-236AB 150mA 400mA 0.36W 200 350 150mA 400mA TO-92 215mA 800mA 0.74W 125 170 215mA 800mA TO-243AA 316mA 1.5A 1.6W 15 78 316mA 1.5A * ID (continuous) is limited by max rated Tj. **Mounted on FR5 board. 25mm x 25mm x 1.57mm. Significant PD increase possible on ceramic substrate. Thermal Characteristics Symbol Parameter Min Typ Max Unit Conditions BVDSS Drain-to-Source Breakdown Voltage 250 V I D = 100µA, VGS = 0V VGS(th) Gate Threshold Voltage 0.6 2.0 V V GS = VDS, ID = 1mA ∆VGS(th) Change in VGS(th) with Temperature -4.5 mV/ °CI D = 1mA, VGS = VDS IGSS Gate Body Leakage 100 nA V GS = ±20V, VDS = 0V IDSS Zero Gate Voltage Drain Current 1.0 µAV GS = 0V, VDS = 100V 10.0 µAV GS = 0V, VDS = Max Rating 1.0 mA V GS = 0V, VDS = 0.8 Max Rating TA = 125°C ID(ON) ON-State Drain Current 0.6 A VGS = 4.5V, VDS = 25V
1.2 V GS = 10V, VDS = 25V
RDS(ON) Static Drain-to-Source 8.0 Ω VGS = 4.5V, ID = 150mA ON-State Resistance 7.0 Ω VGS = 10V, ID = 1.0A ∆RDS(ON) Change in RDS(ON) with Temperature 1.0 %/ °CV GS = 4.5V, ID = 150mA GFS Forward Transconductance 150 m V DS = 25V, ID = 200mA CISS Input Capacitance 110 COSS Common Source Output Capacitance 60 pF V GS = 0V, VDS = 25V, f = 1MHz CRSS Reverse Transfer Capacitance 23 td(ON) Turn-ON Delay Time 20 tr Rise Time 15 td(OFF) Turn-OFF Delay Time 25 tf Fall Time 25 VSD Diode Forward Voltage Drop 1.8 V I SD = 200mA, VGS = 0V trr Reverse Recovery Time 300 ns I SD = 200mA, VGS = 0V Notes: 2.All A.C. parameters sample tested. Electrical Characteristics (@ 25°C unless otherwise specified) VDD = 25V ns I D = 150mA RGEN = 25Ω Ω Switching Waveforms and Test Circuit 90% 10% 90% 90% 10%10% PULSE GENERATOR VDD RL OUTPUT D.U.T. t(ON) td(ON) t(OFF) td(OFF) tFtr INPUT INPUT OUTPUT 10V VDD Rgen TN5325