TN5325K1-G SUTEX | Alldatasheet

Document overview

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Technical content

Features

Low threshold (2.0V max.) High input impedance and high gain Free from secondary breakdown Low CISS and fast switching speeds

Applications

Logic level interfaces - ideal for TTL and CMOS Solid state relays Battery operated systems Photo voltaic drives Analog switches General purpose line drivers Telecom switches General Description This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. N-Channel Enhancement-Mode Vertical DMOS FET Absolute Maximum Ratings Parameter Value Drain-to-source voltage BVDSS Drain-to-gate voltage BVDGS Gate-to-source voltage ±20V Operating and storage temperature -55OC to +150OC Soldering temperature* 300OC Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. * Distance of 1.6mm from case for 10 seconds.

Ordering Information

Package Options BVDSS/BVDGS (V) RDS(ON) (max) (Ω) ID(ON) (min) (A) VGS(th) (max) (V)TO-236AB (SOT-23) TO-92 TO-243AA (SOT-89) TN5325 TN5325K1-G TN5325N3-G TN5325N8-G 250 7.0 1.2 2.0 -G indicates package is RoHS compliant (‘Green’) Pin Configurations TO-243AA (SOT-89) (N8) Product Marking TO-243AA (SOT-89) (N8) TN3CW W = Code for week sealed = “Green” Packagin g GATE SOURCE DRAIN DRAIN TO-236AB (SOT-23) (K1) TO-236AB (SOT-23) (K1) N3CW W = Code for week sealed = “Green” Packagin g DRAIN SOURCE GATE TO-92 (N3) YY = Year Sealed WW = Week Sealed = “Green” Packaging SiTN 5 3 2 5 YYW W TO-92 (N3) GATE SOURCE DRAIN Packages may or may not include the following marks: Si or

  • 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com Electrical Characteristics (TA = 25OC unless otherwise specified) Sym Parameter Min Typ Max Units Conditions BVDSS Drain-to-source breakdown voltage 250 - - V VGS = 0V, ID = 100µA VGS(th) Gate threshold voltage 0.6 - 2.0 V VGS = VDS, ID = 1.0mA ΔVGS(th) Change in VGS(th) with temperature - - -4.5 mV/OC VGS = VDS, ID = 1.0mA IGSS Gate body leakage - - 100 nA VGS = ± 20V, VDS = 0V IDSS Zero gate voltage drain current - - 1.0 µA VGS = 0V, VDS = 100V - - 10 VGS = 0V, VDS = Max Rating - - 1.0 mA VDS = 0.8 Max Rating, VGS = 0V, TA = 125°C ID(ON) On-state drain current 0.6 - - A VGS = 4.5V, VDS = 25V 1.2 - - VGS = 10V, VDS = 25V RDS(ON) Static drain-to-source on-state resistance - - 8.0 Ω VGS = 4.5V, ID = 150mA - - 7.0 VGS = 10V, ID = 1.0A ΔRDS(ON) Change in RDS(ON) with temperature - - 1.0 %/OC VGS = 4.5V, ID = 150mA GFS Forward transductance 150 - - mmho VDS = 25V, ID = 200mA CISS Input capacitance - - 110 pF VGS = 0V, VDS = 25V, f = 1.0MHz COSS Common source output capacitance - - 60 CRSS Reverse transfer capacitance - - 23 td(ON) Turn-on delay time - - 20 ns VDD = 25V, ID = 150mA, RGEN = 25Ω tr Rise time - - 15 td(OFF) Turn-off delay time - - 25 tf Fall time - - 25 VSD Diode forward voltage drop - - 1.8 V VGS = 0V, ISD = 200mA trr Reverse recovery time - 300 - ns VGS = 0V, ISD = 200mA Notes: All D.C. parameters 100% tested at 25OC unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.) All A.C. parameters sample tested. Notes: † ID (continuous) is limited by max rated Tj . ‡ Mounted on FR5 Board, 25mm x 25mm x 1.57mm. Thermal Characteristics Package ID (continuous)† (mA) ID (pulsed) (A) Power Dissipation @TA = 25OC (W) θjc (OC/W) θja (OC/W) IDR (mA) IDRM (A) TO-236AB (SOT-23) 150 0.4 0.36 200 350 150 0.4 TO-92 215 0.8 0.74 125 170 215 0.8 TO-243AA (SOT-89) 316 1.5 1.6‡ 15 78‡ 316 1.5
  • 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com Switching Waveforms and Test Circuit 90% 10% 90% 90% 10%10% PULSE GENERATOR VDD RL OUTPUT D.U.T. t(ON) td(ON) t(OFF) td(OFF) tFtr INPUT INPUT OUTPUT 10V VDD RGEN
  • 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com 3-Lead TO-236AB (SOT-23) Package Outline (K1) 2.90x1.30mm body, 1.12mm height (max), 1.90mm pitch Symbol A A1 A2 b D E E1 e e1 L L1 θ Dimension (mm) 0.95 BSC 1.90 BSC 0.20† 0.54 REF JEDEC Registration TO-236, Variation AB, Issue H, Jan. 1999. † This dimension differs from the JEDEC drawing. Drawings not to scale. Supertex Doc.#: DSPD-3TO236ABK1, Version C041309. View B View A - ASide View Top View View B
  • 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com 3-Lead TO-92 Package Outline (N3) Symbol A b c D E E1 e e1 L Dimensions (inches) JEDEC Registration TO-92. * This dimension is not specified in the JEDEC drawing. † This dimension differs from the JEDEC drawing. Drawings not to scale. Supertex Doc.#: DSPD-3TO92N3, Version E041009. Seating Plane Front View Side View Bottom View E D L e c 1 2 3 b A

Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such appl ications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications ©2009 All rights reserved. Unauthorized use or reproduction is prohibited .

1235 Bordeaux Drive, Sunnyvale, CA 94089

Tel: 408-222-8888 www.supertex.com TN5325 (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Doc.# DSFP-TN5325 A052009 3-Lead TO-243AA (SOT-89) Package Outline (N8) Symbol A b b1 C D D1 E E1 e e1 H L Dimensions (mm) 1.50 BSC 3.00 BSC 3.94 0.89 JEDEC Registration TO-243, Variation AA, Issue C, July 1986. † This dimension differs from the JEDEC drawing Drawings not to scale. Supertex Doc. #: DSPD-3TO243AAN8, Version E051509. b b1