TN2540_13 SUTEX | Alldatasheet

Document overview

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Technical content

Features

► Low threshold (2.0V max.) ► High input impedance ► Low input capacitance (125pF max.) ► Fast switching speeds ► Low on-resistance ► Free from secondary breakdown ► Low input and output leakage

Applications

► Logic level interfaces - ideal for TTL and CMOS ► Solid state relays ► Battery operated systems ► Photo voltaic drives ► Analog and Telecom switches ► General purpose line drivers General Description This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. N-Channel Enhancement-Mode Vertical DMOS FET Absolute Maximum Ratings Parameter Value Drain-to-source voltage BVDSS Drain-to-gate voltage BVDGS Gate-to-source voltage ±20V Operating and storage temperature -55OC to +150OC Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Pin Configuration TO-92 TO-243AA (SOT-89) YY = Year Sealed WW = Week Sealed = “Green” Packaging SiTN 2540 YYWW TO-92 Product Marking TO-243AA (SOT-89) TN5DW W = Code for week sealed = “Green” Packaging Package may or may not include the following marks: Si or Package may or may not include the following marks: Si or GATE SOURCE DRAIN DRAIN GATE SOURCE DRAIN-G denotes a lead (Pb)-free / RoHS compliant package Refer to ‘P0xx’ Tape & Reel Specs for P002, P003, P005, P013, and P014 TO-92 Taping Specifications and Winding Styles Contact factory for Wafer / Die availablity. Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant. Part Number Package Options Packing TN2540N3-G TO-92 1000/Bag TN2540N3-G P002 TO-92 2000/Reel TN2540N3-G P003 TO-92 2000/Reel TN2540N3-G P005 TO-92 2000/Reel TN2540N3-G P013 TO-92 2000/Reel TN2540N3-G P014 TO-92 2000/Reel TN2540N8-G TO-243AA (SOT-89) 2000/Reel

Ordering Information

Typical Thermal Resistance Package θja TO-92 132OC/W TO-243AA (SOT-89) 133OC/W* * Mounted on FR5 Board, 25mm x 25mm x 1.57mm Product Summary BVDSS/BVDGS RDS(ON) (max) ID(ON) (min) VGS(th) (max) 400V 12Ω 1.0A 2.0V

Supertex inc. www.supertex.com Doc.# DSFP-TN2540 A062113 TN2540 Electrical Characteristics (TA = 25OC unless otherwise specified) Sym Parameter Min Typ Max Units Conditions BVDSS Drain-to-source breakdown voltage 400 - - V VGS = 0V, ID = 100µA VGS(th) Gate threshold voltage 0.6 - 2.0 V VGS = VDS, ID= 1.0mA ΔVGS(th) Change in VGS(th) with temperature - -2.5 -4.0 mV/OC VGS = VDS, ID= 1.0mA IGSS Gate body leakage - - 100 nA VGS = ± 20V, VDS = 0V IDSS Zero gate voltage drain current - - 10 µA VGS = 0V, VDS = Max Rating - - 1.0 mA VDS = 0.8 Max Rating, VGS = 0V, TA = 125°C ID(ON) On-state drain current 0.3 0.5 - A VGS = 4.5V, VDS = 25V 0.75 1.0 - VGS = 10V, VDS = 25V RDS(ON) Static drain-to-source on-state resistance - 8.0 12 Ω VGS = 4.5V, ID = 150mA - 8.0 12 VGS = 10V, ID = 500mA ΔRDS(ON) Change in RDS(ON) with temperature - - 0.75 %/OC VGS = 10V, ID = 500mA GFS Forward transductance 125 200 - mmho VDS = 25V, ID = 100mA CISS Input capacitance - 95 125 pF VGS = 0V, VDS = 25V, f = 1.0MHz COSS Common source output capacitance - 20 70 CRSS Reverse transfer capacitance - 10 25 td(ON) Turn-on delay time - - 20 ns VDD = 25V, ID = 1.0A, RGEN = 25Ω tr Rise time - - 15 td(OFF) Turn-off delay time - - 25 tf Fall time - - 20 VSD Diode forward voltage drop - - 1.8 V VGS = 0V, ISD = 200mA trr Reverse recovery time - 300 - ns VGS = 0V, ISD = 1.0A Notes: 2. All A.C. parameters sample tested. Notes: † ID (continuous) is limited by max rated Tj . ‡ Mounted on FR5 Board, 25mm x 25mm x 1.57mm. Thermal Characteristics Package ID (continuous)† ID (pulsed) Power Dissipation @TA = 25OC IDR † IDRM TO-92 175mA 2.0A 1.0W 175mA 2.0A TO-243AA (SOT-89) 260mA 1.8A 1.6W‡ 260mA 1.8A Switching Waveforms and Test Circuit 90% 10% 90% 90% 10%10% Pulse Generator VDD RL OUTPUT D.U.T. t(ON) td(ON) t(OFF) td(OFF)tr INPUT INPUT OUTPUT 10V VDD RGEN tf

Supertex inc. www.supertex.com Doc.# DSFP-TN2540 A062113 TN2540 Typical Performance Curves ID (amperes) VDS (volts) Output Characteristics 0 10 20 30 40 50 2.0 1.6 1.2 0.8 0.4 Saturation Characteristics ID (amperes) VDS (volts) 5.0V 4.0V 3.0V 0246 81 0 0.0 0.2 0.4 0.6 0.8 1.0 VGS = 10V PD (watts) Power Dissipation vs. Ambient Temperature TA (OC) 0 25 50 75 100 125 150 2.0 1.0 TO-243AA Thermal Resistance (normalized) Thermal Response Characteristics tp (seconds) TO-243AA PD = 1.6W TC = 25 OC 1.0 0.8 0.6 0.4 0.2 0.001 0.01 0.1 1.0 10 Maximum Rated Safe Operating Area ID (amperes) VDS (volts) 0.1 1.0 10 100 1.0 0.1 0.01 0.001 TO-243AA(DC) TO-92(DC) TO-243AA(pulsed) TO-92(DC) GFS (siemens) ID (amperes) Transconductance vs. Drain Current 0.0 0.2 0.4 0.6 0.8 1.0 VDS =15V 125 OC 0.8 TA = -55 OC 25 OC 6.0V 8.0V VGS = 10V

Supertex inc. www.supertex.com Doc.# DSFP-TN2540 A062113 TN2540 Typical Performance Curves (cont.) Gate Drive Dynamic Characteristics QG (nanocoulombs) VGS (volts) Tj (OC) VGS(th) (normalized) RDS (normalized) V(th) and RDS Variation with Temperature On-Resistance vs. Drain Current ID (amperes) RDS(ON) (ohms) BVDSS Variation with Temperature VDSS (normalized) Tj (OC) Transfer Characteristics VGS (volts) ID (amperes) Capacitance vs. Drain-to-Source Voltage 200 150 100 C (picofarads) VDS (volts) 0 10 20 30 40 0 2 4 6 8 10 1.5 1.2 0.9 0.6 0.3 -50 0 50 100 150 1.1 1.0 0.9 1.4 1.2 1.0 0.8 0.6 2.5 2.0 1.5 1.0 0.5 VDS = 40V VDS = 10V 95pF VGS = 4.5V VGS = 10V TA = -55OC VDS = 25OC 25OC f = 1MHz CISS COSSCRSS 260pF V(th) @ 1mA RDS(ON) @ 10V, 0.5A 125OC -50 0 50 100 150

Supertex inc. www.supertex.com Doc.# DSFP-TN2540 A062113 TN2540 3-Lead TO-92 Package Outline (N3) Symbol A b c D E E1 e e1 L Dimensions (inches) JEDEC Registration TO-92. * This dimension is not specified in the JEDEC drawing. † This dimension differs from the JEDEC drawing. Drawings not to scale. Supertex Doc.#: DSPD-3TO92N3, Version E041009. Seating Plane Front View Side View Bottom View E D L e c 1 2 3 b A

Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such appl ications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liabilit y to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) ©2013 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Supertex inc.

1235 Bordeaux Drive, Sunnyvale, CA 94089

Tel: 408-222-8888 www.supertex.com TN2540 (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Doc.# DSFP-TN2540 A062113 3-Lead TO-243AA (SOT-89) Package Outline (N8) Symbol A b b1 C D D1 E E1 e e1 H L Dimensions (mm) 1.50 BSC 3.00 BSC 3.94 0.73† JEDEC Registration TO-243, Variation AA, Issue C, July 1986. † This dimension differs from the JEDEC drawing Drawings not to scale. Supertex Doc. #: DSPD-3TO243AAN8, Version F111010. b b1 D E H E1 C A 1 2 3 e Top View Side View L