TN2524_07 SUTEX | Alldatasheet

Document overview

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Technical content

Features

Low threshold — 2.0V max High input impedance Low input capacitance — 125pF max Fast switching speeds Low ON-resistance Free from secondary breakdown Low input and output leakage Complementary N and P-channel devices

Applications

Logic level interfaces — ideal for TTL and CMOS Solid state relays Battery operated systems Photo voltaic devices Analog switches General purpose line drivers Telecom switches W = Code for week sealedTN5CW GATE SOURCE DRAIN DRAIN

Electrical Characteristics (TA = 25OC unless otherwise specifi ed) Sym Parameter Min Typ Max Units Conditions BVDSS Drain-to-source breakdown voltage 240 - - V V GS = 0V, ID = 2.0mA VGS(th) Gate threshold voltage 0.6 - 2.0 V V GS = VDS, ID= 1.0mA ΔVGS(th) Change in VGS(th) with temperature - - -5.0 mV/ OCV GS = VDS, ID= 1.0mA IGSS Gate body leakage - - 100 nA V GS = ± 20V, VDS = 0V IDSS Zero gate voltage drain current - - 10 µA V GS = 0V, VDS = Max Rating - - 1.0 mA VGS = 0V, VDS = 0.8 Max Rat- ing, TA = 125°C ID(ON) ON-state drain current 0.5 1.9 - A VGS = 4.5V, VDS = 25V 1.0 2.8 - V GS = 10V, VDS = 25V RDS(ON) Static drain-to-source ON-state resistance - 4.0 6.0 Ω VGS = 4.5V, ID = 250mA - 4.0 6.0 V GS = 10, ID = 0.5A ΔRDS(ON) Change in RDS(ON) with temperature - - 1.4 %/ OCV GS = 10V, ID = 0.5A GFS Forward transductance 300 600 - mmho V DS = 25V, ID = 0.5A CISS Input capacitance - 65 125 pF VGS = 0V, VDS = 25V, f = 1.0MHz COSS Common source output capacitance - 35 70 CRSS Reverse transfer capacitance - 10 25 td(ON) Turn-ON delay time - - 10 ns VDD = 25V, ID = 1.0A, RGEN = 25Ω tr Rise time - - 10 td(OFF) Turn-OFF delay time - - 20 tf Fall time - - 20 VSD Diode forward voltage drop - - 1.8 V V GS = 0V, ISD = 1.0A trr Reverse recovery time - 300 - ns V GS = 0V, ISD = 1.0A Notes: (1) All D.C. parameters 100% tested at 25OC unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.) (2) All A.C. parameters sample tested. Notes: * ID (continuous) is limited by max rated Tj . † Mounted on FR5 board, 25mm x 25mm x 1.57mm. Thermal Characteristics Package ID (continuous)* (A) ID (pulsed) (A) Power Dissipation @TA = 25OC (W) θjc (OC/W) θja (OC/W) IDR (A) IDRM (A) Switching Waveforms and Test Circuit 90% 10% 90% 90% 10%10% PULSE GENERATOR VDD RL OUTPUT D.U.T. t(ON) td(ON) t(OFF) td(OFF) tFtr INPUT INPUT OUTPUT 10V VDD RGEN

Typical Performance Curves

Typical Performance Curves (cont.) Gate Drive Dynamic Characteristics Q (nanocoulombs)G V SG )stlov( Tj )ht(SGV) dezilamron( )NO(SDR) dezilamron( V DS(th) and R Variation with Temperature C)°( On-Resistance vs. Drain Current (amperes)D )smho()NO(SDR Variation with TemperatureDSS SSD )dezilamron(VB C)°(Tj Transfer Characteristics VGS (volts) I )serepma(D Capacitance vs. Drain-to-Source Voltage 200 )sdarafocip( C VDS (volts) I BV 0 1 02 03 04 0 150 100 02468 1 0 3.0 2.5 2.0 1.5 1.0 0.5 -50 0 50 100 150 1.1 1.0 1.4 1.2 1.0 0.8 0.6 -50 0 50 100 150 63pF VDS = 40V VDS = 10V VGS = 4.5V VGS = 10V T = -55°CA VDS = 25V 150°C 0123 5 4 f = 1MHz CISS COSS CRSS 0.9 150 pF 2.4 2.0 1.6 1.2 0.8 0.4 (th)V @ 1mA RDS(ON) @ 10V, 0.5A 25°C

(The package drawing(s) in this data sheet may not refl ect the most current specifi cations. For the latest package outline information go to http://www.supertex.com/packaging.html.) Doc.# DSFP-TN2524 A101207 3-Lead TO-243AA (SOT-89) Package Outline (N8) Symbol A b b1 C D D1 E E1 e e1 H L Dimensions (mm) 1.50 BSC 3.00 BSC 3.94 0.89 JEDEC Registration TO-243, Variation AA, Issue C, July 1986. Drawings not to scale. D E H e A C L Top View Side View b