TN0610N3-G SUTEX | Alldatasheet

Document overview

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Technical content

Features

Low threshold - 2.0V max. High input impedance Low input capacitance - 100pF typical Fast switching speeds Low on-resistance Free from secondary breakdown Low input and output leakage Complementary N- and P-channel devices

Applications

Logic level interfaces - ideal for TTL and CMOS Solid state relays Battery operated systems Photo voltaic drives Analog switches General purpose line drivers Telecom switches General Description This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. N-Channel Enhancement-Mode Vertical DMOS FET Absolute Maximum Ratings Parameter Value Drain-to-source voltage BVDSS Drain-to-gate voltage BVDGS Gate-to-source voltage ±20V Operating and storage temperature -55OC to +150OC Soldering temperature* 300OC Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. * Distance of 1.6mm from case for 10 seconds.

Ordering Information

Package Option BVDSS/BVDGS (V) RDS(ON) (max) (Ω) ID(ON) (min) (A) VGS(th) (max) (V)TO-92 TN0610 TN0610N3-G 100 1.5 3.0 2.0 -G indicates package is RoHS compliant (‘Green’) Pin Configurations TO-92 (N3) GATE SOURCE DRAIN YY = Year Sealed WW = Week Sealed = “Green” Packaging T N 0 6 1 0 Y Y WW TO-92 (N3) Product Marking

  • 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com Electrical Characteristics (TA = 25OC unless otherwise specified) Sym Parameter Min Typ Max Units Conditions BVDSS Drain-to-source breakdown voltage 100 - - V VGS = 0V, ID = 1.0mA VGS(th) Gate threshold voltage 0.6 - 2.0 V VGS = VDS, ID= 1.0mA ΔVGS(th) Change in VGS(th) with temperature - - -4.5 mV/OC VGS = VDS, ID= 1.0mA IGSS Gate body leakage - - 100 nA VGS = ± 20V, VDS = 0V IDSS Zero gate voltage drain current - - 10 µA VGS = 0V, VDS = Max Rating - - 1.0 mA VDS = 0.8 Max Rating, VGS = 0V, TA = 125°C ID(ON) On-state drain current 1.2 2.0 - A VGS = 5.0V, VDS = 25V 3.0 6.7 - VGS = 10V, VDS = 25V RDS(ON) Static drain-to-source on-state resistance - - 15 Ω VGS = 3.0V, ID = 250mA - 1.5 2.0 VGS = 5.0V, ID = 750mA - 1.0 1.5 VGS = 10V, ID = 750mA ΔRDS(ON) Change in RDS(ON) with temperature - - 0.75 %/OC VGS = 10V, ID = 750mA GFS Forward transductance 400 500 - mmho VDS = 25V, ID = 1.0A CISS Input capacitance - 100 150 pF VGS = 0V, VDS = 25V, f = 1.0MHz COSS Common source output capacitance - 50 85 CRSS Reverse transfer capacitance - 10 35 td(ON) Turn-on delay time - - 6 ns VDD = 25V, ID = 1.5A, RGEN = 25Ω tr Rise time - - 14 td(OFF) Turn-off delay time - - 16 tf Fall time - - 16 VSD Diode forward voltage drop - 0.8 1.8 V VGS = 0V, ISD = 1.5A trr Reverse recovery time - 300 - ns VGS = 0V, ISD = 1.5A Notes: All D.C. parameters 100% tested at 25OC unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.) All A.C. parameters sample tested. Notes: † ID (continuous) is limited by max rated Tj . Thermal Characteristics Package ID (continuous)† (mA) ID (pulsed) (A) Power Dissipation @TC = 25OC (W) θjc (OC/W) θja (OC/W) IDR (mA) IDRM (A) TO-92 500 3.2 1.0 125 170 500 3.2 Switching Waveforms and Test Circuit 90% 10% 90% 90% 10%10% PULSE GENERATOR VDD RL OUTPUT D.U.T. t(ON) td(ON) t(OFF) td(OFF) tFtr INPUT INPUT OUTPUT 10V VDD RGEN
  • 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com Typical Performance Curves Output Characteristics 0 10 20 30 5040 VDS (volts) I )serepma(D Saturation Characteristics VDS (volts) I )serepma(D Maximum Rated Safe Operating Area 0.1 1.0 0.01 VDS (volts) I )serepma(D Thermal Response Characteristics )dezilamron( ecnatsiseR lamrehT 1.0 0.8 0.6 0.4 0.2 0.001 100.01 0.1 1 tp (seconds) Transconductance vs. Drain Current 1.0 0.8 0.6 0.4 0.2 1 102 4 6 8 G SF )snemeis( ID (amperes) Power Dissipation vs. Case Temperature 0 15010050 2.0 1.0 1257525 TC C)°( DP )sttaw( 10V 1 100010010 1 102 4 6 8 10V TO-92 VGS = VDS = 25V TA = -55°C TA = 25°C TA = 150°C TC = 25°C VGS = TO-92 (DC) TO-92 PD = 1W TC = 25 °C
  • 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com Typical Performance Curves (cont.) Gate Drive Dynamic Characteristics Q (nanocoulombs)G V SG )stlov( Tj )ht(SGV )dezilamron( )NO(SDR )dezilamron( V DS(th) and R Variation with Temperature OC)( On-Resistance vs. Drain Current (amperes)D )smho()NO(SDR Variation with TemperatureDSS SSD )dezilamron(VB C)O(Tj Transfer Characteristics VGS (volts) I )serepma(D Capacitance vs. Drain-to-Source Voltage 200 150 100 )sdarafocip( C VDS (volts) I BV 0 10 20 30 4 0 0 2 4 6 8 1 0 -50 0 50 100 150 1.1 1.0 0.9 1.4 1.2 1.0 0.8 0.6 2.0 1.6 1.2 0.8 0.4 -50 0 50 1 00 150 95 pF VDS = 40V VDS = 10V 172 pF (th)V @ 1mA VGS = 5V VGS = 10V T = -55A OCVDS = 25V CISS COSS CRSS 25OC 150OC 0 2 4 6 108 R @ 10V, 0.75ADS f = 1MHz

Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such appl ications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications ©2008 All rights reserved. Unauthorized use or reproduction is prohibited .

1235 Bordeaux Drive, Sunnyvale, CA 94089

Tel: 408-222-8888 www.supertex.com TN0610 (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Doc.# DSFP-TN0610 A091208 3-Lead TO-92 Package Outline (N3) Symbol A b c D E E1 e e1 L Dimensions (inches) JEDEC Registration TO-92. * This dimension is not specified in the original JEDEC drawing. The value listed is for reference only. † This dimension is a non-JEDEC dimension. Drawings not to scale. Supertex Doc.#: DSPD-3TO92N3, Version D080408. Seating Plane Front View Side View Bottom View E D L e c 1 2 3 b A