TN0604_13 SUTEX | Alldatasheet

Document overview

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Technical content

Features

► Low threshold (1.6V max.) ► High input impedance ► Low input capacitance (140pF typical) ► Fast switching speeds ► Low on-resistance ► Free from secondary breakdown ► Low input and output leakage

Applications

► Logic level interfaces - ideal for TTL and CMOS ► Solid state relays ► Battery operated systems ► Photo voltaic drives ► Analog switches ► General purpose line drivers ► Telecom switches General Description This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. N-Channel Enhancement-Mode Vertical DMOS FET Absolute Maximum Ratings Parameter Value Drain-to-source voltage BVDSS Drain-to-gate voltage BVDGS Gate-to-source voltage ±20V Operating and storage temperature -55OC to +150OC Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Pin Configuration TO-92 GATE SOURCE DRAIN YY = Year Sealed WW = Week Sealed = “Green” Packaging SiTN 0 604 YYWW TO-92 Product Marking Package may or may not include the following marks: Si or

Ordering Information

Part Number Package Option Packing TN0604N3-G TO-92 1000/Bag TN0604N3-G P002 TO-92 2000/Reel TN0604N3-G P003 TN0604N3-G P005 TN0604N3-G P013 TN0604N3-G P014 Product Summary BVDSS/BVDGS RDS(ON) (max) ID(ON) (min) VGS(th) (max) 40V 0.75Ω 4.0A 1.6V Typical Thermal Resistance Package θja TO-92 132OC/W -G denotes a lead (Pb)-free / RoHS compliant package. Contact factory for Wafer / Die availablity. Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant.

Supertex inc. www.supertex.com Doc.# DSFP-TN0604 D080813 Electrical Characteristics (TA = 25OC unless otherwise specified) Sym Parameter Min Typ Max Units Conditions BVDSS Drain-to-source breakdown voltage 40 - - V VGS = 0V, ID = 2.0mA VGS(th) Gate threshold voltage 0.6 - 1.6 V VGS = VDS, ID= 1.0mA ΔVGS(th) Change in VGS(th) with temperature - -3.8 -4.5 mV/OC VGS = VDS, ID= 1.0mA IGSS Gate body leakage - - 100 nA VGS = ± 20V, VDS = 0V IDSS Zero gate voltage drain current - - 10 µA VGS = 0V, VDS = Max Rating - - 1.0 mA VDS = 0.8 Max Rating, VGS = 0V, TA = 125°C ID(ON) On-state drain current 1.5 2.1 - A VGS = 5.0V, VDS = 20V 4.0 7.0 - VGS = 10V, VDS = 20V RDS(ON) Static drain-to-source on-state resistance - 1.0 1.6 Ω VGS = 5.0V, ID = 0.75A - 0.6 0.75 VGS = 10V, ID = 1.5A ΔRDS(ON) Change in RDS(ON) with temperature - 0.5 0.75 %/OC VGS = 10V, ID = 1.5A GFS Forward transductance 500 800 - mmho VDS = 20V, ID = 1.5A CISS Input capacitance - 140 190 pF VGS = 0V, VDS = 20V, f = 1.0MHz COSS Common source output capacitance - 75 110 CRSS Reverse transfer capacitance - 25 50 td(ON) Turn-on delay time - - 10 ns VDD = 20V, ID = 0.5A, RGEN = 25Ω tr Rise time - - 6.0 td(OFF) Turn-off delay time - - 25 tf Fall time - - 20 VSD Diode forward voltage drop - 1.2 1.8 V VGS = 0V, ISD = 1.5A trr Reverse recovery time - 300 - ns VGS = 0V, ISD = 1.0A Notes: 2. All A.C. parameters sample tested. Notes: † ID (continuous) is limited by max rated Tj . Thermal Characteristics Package ID (continuous)† ID (pulsed) Power Dissipation @TA = 25OC IDR † IDRM Switching Waveforms and Test Circuit 90% 10% 90% 90% 10%10% Pulse Generator VDD RL OUTPUT D.U.T. t(ON) td(ON) t(OFF) td(OFF)tr INPUT INPUT OUTPUT 10V VDD RGEN tf

Supertex inc. www.supertex.com Doc.# DSFP-TN0604 D080813 Typical Performance Curves Power Dissipation vs. Ambient Temperature 0 25 50 75 100 125 150 TO-92 TA (OC) VGS = 10V Output Characteristics 8.0 6.0 4.0 2.0 0 10 20 30 40 VDS (volts) ID (amperes) Saturation Characteristics 0 2.0 4.0 6.0 8.0 10 Maximum Rated Safe Operating Area 0.1 1.0 10 100 1.0 0.1 0.01 TO-92 (DC) TC = 25OC VDS (volts) ID (amperes) Thermal Response Characteristics Thermal Resistance (normalized) 1.0 0.8 0.6 0.4 0.2 0.001 0.01 0.1 1.0 10 tP (seconds) Transconductance vs. Drain Current 2.0 1.0 GFS (siemens) ID (amperes) TA = -55OC PD (watts) VDS = 25V TO-92 (pulsed) TO-92 PD = 1.0W TC = 25OC VGS = 10V VDS (volts) ID (amperes) 125OC 25OC 8.0 6.0 4.0 2.0 2.0 1.0

Supertex inc. www.supertex.com Doc.# DSFP-TN0604 D080813 Typical Performance Curves (cont.) Gate Drive Dynamic Characteristics 8.0 6.0 4.0 2.0 170 pF 1.4 1.2 1.0 0.8 0.6 On-Resistance vs. Drain Current 2.0 1.0 0 5.0 10 1.1 1.0 0.9 -50 0 50 100 150 Transfer Characteristics 8.0 6..0 4.0 2.0 0 2.0 4.0 6.0 8.0 10 VDS = 25V Capacitance vs. Drain-to-Source Voltage 200 150 100 0 10 20 30 40 C (picofarads) f = 1.0MHz COSS CRSS 170 pF V(th) @1.0mA RDS @10V, 1.5A CISS RDS(ON) (ohms) BVDSS (normalized) Tj (OC) ID (amperes) BVDSS Variation with Temperature VGS = 5.0V VGS(th) (normalized) RDS(ON) (normalized) V(th) and RDS Variation with Temperature VGS (volts) ID (amperes) QG (nanocoulombs) VGS (volts) VDS (volts) VDS = 10V VGS = 1.0V Tj (OC) TA = -55OC 25OC 125OC VDS = 40V -50 0 50 100 150 1.4 1.2 1.0 0.8 0.6

Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such appl ications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liabilit y to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) ©2013 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Supertex inc.

1235 Bordeaux Drive, Sunnyvale, CA 94089

Tel: 408-222-8888 www.supertex.com TN0604 (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Doc.# DSFP-TN0604 D080813 3-Lead TO-92 Package Outline (N3) Symbol A b c D E E1 e e1 L Dimensions (inches) JEDEC Registration TO-92. * This dimension is not specified in the JEDEC drawing. † This dimension differs from the JEDEC drawing. Drawings not to scale. Supertex Doc.#: DSPD-3TO92N3, Version E041009. Seating Plane Front View Side View Bottom View E D L e c 1 2 3 b A