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Technical content

Features

► Low threshold - 2.0V max. ► High input impedance ► Low input capacitance - 50pF typical ► Fast switching speeds ► Low on-resistance ► Free from secondary breakdown ► Low input and output leakage

Applications

► Logic level interfaces – ideal for TTL and CMOS ► Solid state relays ► Battery operated systems ► Photo voltaic drives ► Analog switches ► General purpose line drivers ► Telecom switches General Description This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. N-Channel Enhancement-Mode Vertical DMOS FET Absolute Maximum Ratings Parameter Value Drain-to-source voltage BVDSS Drain-to-gate voltage BVDGS Gate-to-source voltage ±20V Operating and storage temperature -55OC to +150OC Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. TO-92 (N3) GATE SOURCE DRAIN YY = Year Sealed WW = Week Sealed = “Green” Packaging SiTN 0106 YYWW TO-92 (N3) Product Marking Package may or may not include the following marks: Si or Pin Configurations

Ordering Information

Package Wafer / Die Options TO-92 NW (Die in wafer form) NJ (Die on adhesive tape) ND (Die in waffle pack) TN0106 TN0106N3-G TN1506NW TN1506NJ TN1506ND For packaged products, -G indicates package is RoHS compliant (‘Green’). Devices in Wafer / Die form are RoHS compliant (‘Green’). Refer to Die Specification VF15 for layout and dimensions. Product Summary Device BVDSS/BVDGS (V) RDS(ON) (max) (Ω) ID(ON) (min) (A) VGS(th) (max) (V) TN0106N3-G 60 3.0 2.0 2.0

Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com Electrical Characteristics (TA = 25OC unless otherwise specified) Sym Parameter Min Typ Max Units Conditions BVDSS Drain-to-source breakdown voltage 60 - - V VGS = 0V, ID = 1.0mA VGS(th) Gate threshold voltage 0.6 - 2.0 V VGS = VDS, ID= 0.5mA ΔVGS(th) Change in VGS(th) with temperature - -3.2 -5.0 mV/OC VGS = VDS, ID= 1.0mA IGSS Gate body leakage - - 100 nA VGS = ± 20V, VDS = 0V IDSS Zero Gate voltage drain current - - 10 µA VGS = 0V, VDS = Max Rating - - 500 VDS = 0.8 Max Rating, VGS = 0V,TA = 125°C ID(ON) On-state drain current 0.75 1.4 - A VGS = 5.0V, VDS = 25V 2.0 3.4 - VGS = 10V, VDS = 25V RDS(ON) Static drain-to-source on-state resistance - 2.0 4.5 Ω VGS = 4.5V, ID = 250mA - 1.6 3.0 VGS = 10V, ID = 500mA ΔRDS(ON) Change in RDS(ON) with temperature - 0.6 1.1 %/OC VGS = 10V, ID = 500mA GFS Forward transductance 225 400 - mmho VDS = 25V, ID = 500mA CISS Input capacitance - 50 60 pF VGS = 0V, VDS = 25V, f = 1.0MHz COSS Common source output capacitance - 25 35 CRSS Reverse transfer capacitance - 4.0 8.0 td(ON) Turn-on delay time - 2.0 5.0 ns VDD = 25V, ID = 1.0A, RGEN = 25Ω tr Rise time - 3.0 5.0 td(OFF) Turn-off delay time - 6.0 7.0 tf Fall time - 3.0 6.0 VSD Diode forward voltage drop 1.0 1.5 V VGS = 0V, ISD = 500mA trr Reverse recovery time - 400 - ns VGS = 0V, ISD = 500mA Notes: 2. All A.C. parameters sample tested. Notes: † ID (continuous) is limited by max rated Tj . Thermal Characteristics Package ID (continuous)† (mA) ID (pulsed) (A) Power Dissipation @TC = 25OC (W) θjc (OC/W) θja (OC/W) IDR (mA) IDRM (A) TO-92 350 2.0 1.0 125 170 350 2.0 Switching Waveforms and Test Circuit 90% 10% 90% 90% 10%10% Pulse Generator VDD RL OUTPUT D.U.T. t(ON) td(ON) t(OFF) td(OFF)tr INPUT INPUT OUTPUT 10V VDD RGEN tf

Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com Typical Performance Curves Output Characteristics 5.0 4.0 3.0 2.0 1.0 0 10 20 30 40 50 VDS (volts) ID (amperes) Saturation Characteristics 0 2.0 4.0 6.0 8.0 10 Maximum Rated Safe Operating Area 1.0 10 100 1000 1.0 0.1 0.01 VDS (volts) Thermal Response Characteristics Thermal Resistance (normalized) 1.0 0.8 0.6 0.4 0.2 0.001 0.01 0.1 1.0 10 tp (seconds) Transconductance vs. Drain Current 0.5 0.4 0.3 0.2 0.1 GFS (siemens) ID (amperes) Power Dissipation vs. Case Temperature 0 25 50 75 100 125 150 2.0 1.0 TC (OC) PD (watts) VDS = 25V TO-92 TO-92 TC = 25OC PD = 1W TO-92 (DC) TO-92 (pulsed) TA = -55OC VGS = 10V TC = 25OC VDS (volts) VGS = 10V ID (amperes) TA = 25OC TA = 150OC ID (amperes) 5.0 4.0 3.0 2.0 1.0

Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com Typical Performance Curves (cont.) Gate Drive Dynamic Characteristics QG (nanocoulombs) VGS (volts) VGS(th) (normalized) RDS(ON) (normalized) V(th) and RDS Variation with Temperature On-Resistance vs. Drain Current ID (amperes) RDS(ON) (ohms) BVDSS Variation with Temperature BVDSS (normalized) Tj (OC) Transfer Characteristics VGS (volts) ID (amperes) Capacitance vs. Drain-to-Source Voltage 100 C (picofarads) VDS (volts) 0 10 20 30 40 0 2.0 4.0 6.0 8.0 10 3.0 2.4 1.8 1.2 0.6 -50 0 50 100 150 1.3 1.2 1.1 1.0 0.9 0.8 5.0 4.0 3.0 2.0 1.0 1.4 1.2 1.0 0.8 0.6 0.4 8.0 6.0 4.0 2.0 -50 0 50 100 150 f = 1.0MHz 50pF VGS = 5.0V VDS = 25V TA = -55OC 25OC 150OC V(th) @ 0.5mA RDS(ON) @ 10V, 0.5A CISS COSS CRSS VDS = 10V 55pF VGS = 10V Tj (OC) VDS = 40V 1.4 1.2 1.0 0.8 0.6 0.4

Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such appl ications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) ©2011 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Supertex inc.

1235 Bordeaux Drive, Sunnyvale, CA 94089

Tel: 408-222-8888 www.supertex.com TN0106 (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Doc.# DSFP-TN0106 B080811 3-Lead TO-92 Package Outline (N3) Symbol A b c D E E1 e e1 L Dimensions (inches) JEDEC Registration TO-92. * This dimension is not specified in the JEDEC drawing. † This dimension differs from the JEDEC drawing. Drawings not to scale. Supertex Doc.#: DSPD-3TO92N3, Version E041009. Seating Plane Front View Side View Bottom View E D L e c 1 2 3 b A