PK650DY

PK650DY UNIKC | Alldatasheet

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Dual N-Channel Enhancement Mode MOSFET PRODUCT SUMMARY V(BR)DSS CH. 30V Q2 30V Q1 PDFN 5*6P ABSOLUTE MAXIMUM RATINGS (TA = 25 ° C Unless Otherwise Noted) CH. Continuous Drain Current3 A Gate-Source Voltage V Avalanche Current IDM ± 20 TC = 25 °C TA = 25 ° C Continuous Drain Current 36A SYMBOL Drain-Source Voltage Pulsed Drain Current1 VDS VGS TC = 100 ° C TA = 70 ° C Avalanche Energy IDRDS(ON) LIMITS TC = 100 ° C TC = 25 ° C ID ID IAS mJ PD W 135 1414 L = 0.1mH EAS UNITSUNITS 130 ± 20 83A PARAMETERS/TEST CONDITIONS 2.8mΩ @VGS = 10V 11mΩ @VGS = 10V Power Dissipation REV 1.0 1 2017/1/5

Dual N-Channel Enhancement Mode MOSFET THERMAL RESISTANCE RATINGS CH. TYPICA L UNITS 1Pulse width limited by maximum junction temperature TJ(MAX)=150° C. 2The value of RqJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25° C.The value in any given application depends on the user's specific board design. 3Package limitation current :Q1=29A,Q2=42A. ELECTRICAL CHARACTERISTICS (TJ = 25 ° C, Unless Otherwise Noted) MIN TYP MAX Q2 30 Q1 30 Q2 1.3 1.75 2.3 Q1 1.3 1.75 2.3 Q2 ± 100 Q1 ± 100 Q2 1 Q1 1 Q2 10 Q1 10 Q2 2.1 3.8 Q1 10 14 Q2 1.6 2.8 Q1 6.8 11 Q2 55 Q1 40 VGS = 10V, ID = 10A mΩDrain-Source On-State Resistance1 RDS(ON) VDS = VGS, ID = 250mA Drain-Source Breakdown Voltage V(BR)DSS IGSS VGS = 0V, ID = 250mA mA PARAMETER SYMBOL VDS = 0V, VGS = ± 20V VGS = 4.5V, ID = 16A 3.4Junction-to-Case Junction-to-Ambient2 STATIC LIMITSCH. ° C / W TJ, TSTG 1.3 4.4 TA = 25 ° C W Gate-Body Leakage -55 to 150 Zero Gate Voltage Drain Current IDSS VDS = 24V, VGS = 0V VDS = 20V, VGS = 0V , TJ = 55 ° C RqJA RqJC TEST CONDITIONS VGS(th) TEST CONDITIONS Gate Threshold Voltage SYMBOLTHERMAL RESISTANCE Operating Junction & Storage Temperature Range PD MAXIMUM 1.5 2.4 TA = 70 ° C Power Dissipation UNITS V nA Forward Transconductance1 gfs VDS = 5V, ID = 20A VDS = 5V, ID = 10A S VGS = 4.5V, ID = 10A VGS = 10V, ID = 20A REV 1.0 2 2017/1/5

Dual N-Channel Enhancement Mode MOSFET Q2 3685 Q1 531 Q2 615 Q1 147 Q2 388 Q1 67 Q2 1 Q1 1 Q2 72 Q1 10 Q2 37 Q1 5.6 Q2 10 Q1 1.4 Q2 18 Q1 3 Q2 32 Q1 15 Q2 16 Q1 13 Q2 72 Q1 21 Q2 10 Q1 15 Q2 36 Q1 23 Q2 1 Q1 1.2 Q2 28 Q1 8.8 Q2 13 Q1 1.2 1Pulse test : Pulse Width  300 msec, Duty Cycle  2％. 2Independent of operating temperature. 3Package limitation current :Q1=29A,Q2=42A. Gate-Source Charge2 DYNAMICDYNAMIC Input Capacitance VGS = 0V, VDS = 15V, f = 1MHz Total Gate Charge2 Qg VGS=4.5V Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss td(on) VDS = 15V, ID @ 20A, VGS=10V, RGEN= 6Ω VDS = 15V , ID @ 10A, VGS = 10V, RGEN =6Ω nS Rise Time2 pF Gate Resistance Rg VGS = 0V, VDS = 0V, f = 1MHz Ω VGS=10V IS SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TJ = 25 ° C) A Qgs Gate-Drain Charge2 Qgd VDS = 15V , ID = 20A VDS = 15V , ID = 10A nC Turn-On Delay Time2 IF = 10A, VGS = 0V V Reverse Recovery Time trr tr Turn-Off Delay Time2 td(off) Fall Time2 tf Continuous Current3 Reverse Recovery Charge Qrr IF = 20A, dlF/dt = 100A /ms IF = 10A, dlF/dt = 100A /mS nS nC Forward Voltage1 VSD IF = 20A, VGS = 0V REV 1.0 3 2017/1/5

Dual N-Channel Enhancement Mode MOSFET REV 1.0 4 2017/1/5

Dual N-Channel Enhancement Mode MOSFET REV 1.0 5 2017/1/5

Dual N-Channel Enhancement Mode MOSFET REV 1.0 6 2017/1/5

Dual N-Channel Enhancement Mode MOSFET REV 1.0 7 2017/1/5

Dual N-Channel Enhancement Mode MOSFET ＊散热片形状会因为封装厂框架不同而有所差异。 REV 1.0 8 2017/1/5

Dual N-Channel Enhancement Mode MOSFET A. Marking Information B. Tape&Reel Information:3000pcs/Reel REV 1.0 9 2017/1/5

Dual N-Channel Enhancement Mode MOSFET REV 1.0 10 2017/1/5

Dual N-Channel Enhancement Mode MOSFET D.Label rule 标签内容(Label content) REV 1.0 11 2017/1/5