PK5B3BA UNIKC | Alldatasheet

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P-Channel Logic Level Enhancement Mode MOSFET PRODUCT SUMMARY V(BR)DSS 100% UIS Tested 100% Rg Tested PDFN 5x6P ABSOLUTE MAXIMUM RATINGS (TA = 25 ° C Unless Otherwise Noted) W Continuous Drain Current4 Power Dissipation3 TA = 25 ° C TA = 70 ° C TA = 25 ° C TA = 70 ° C -46 PD -40 VGS LIMITS °C-55 to 150 mJ UNITS -100 V A-12 -74 -49.8 -9.6 2.2 1.4 IDM Avalanche Current IAS Operating Junction & Storage Temperature Range SYMBOL VDS Pulsed Drain Current1 124 ± 25 ID TC = 25 ° C RDS(ON) TC = 100 ° C PARAMETERS/TEST CONDITIONS Drain-Source Voltage Gate-Source Voltage 8mΩ @VGS = -10V -74A ID -40V TJ, TSTG TC = 25 ° C TC = 100 ° C EASAvalanche Energy L = 0.1mH REV1.0 1 2016/12/26

P-Channel Logic Level Enhancement Mode MOSFET THERMAL RESISTANCE RATINGS UNITS 1Pulse width limited by maximum junction temperature. 2The value of RqJA is measured with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA = 25° C.The value in any given application depends on the user's specific board design. 3The Power dissipation is based on RqJA t ≦10s value. 4Package limitation current is -51A. ELECTRICAL CHARACTERISTICS (TJ = 25 ° C, Unless Otherwise Noted) MIN TYP MAX -40 -1 -1.6 -3 ± 100 nA -10 6.2 8 8.4 14 60 S 3933 507 451 3.5 Ω 173 122 Junction-to-Case Steady-State RqJC 1.5 ° C / W Gate Resistance Rg VGS = 0V, VDS = 0V, f = 1MHz Total Gate Charge2 Gate-Drain Charge2 Gate-Source Charge2 Qgd Qgs Junction-to-Ambient2 Junction-to-Ambient2 t ≦10s 35 RqJA Qg VDS = -20V, VGS = -10V , ID = -20A STATIC MAXIMUM 56Steady-State RqJA UNITSPARAMETER V IGSS Drain-Source Breakdown Voltage VGS(th) Gate-Body Leakage VDS = VGS, ID = -250mA VDS = 0V, VGS = ± 25V SYMBOL Input Capacitance Output Capacitance Forward Transconductance1 Reverse Transfer Capacitance Crss VDS = -30V, VGS = 0V , TJ = 125 ° C VGS = -10V, ID = -20A VDS = -5V, ID = -20A Zero Gate Voltage Drain Current gfs nC VGS = 0V, VDS = -20V, f = 1MHz pF Ciss Coss VGS = -4.5V, ID = -15A uA mΩ DYNAMIC VDS = -32V, VGS = 0V LIMITS THERMAL RESISTANCE SYMBOL TYPICAL nSVDS = -20V, ID @ -20A, VGS = -10V, RGS = 6Ω Rise Time2 Turn-Off Delay Time2 td(on) tr td(off) tfFall Time2 Turn-On Delay Time2 TEST CONDITIONS Drain-Source On-State Resistance1 RDS(ON) Gate Threshold Voltage IDSS VGS = 0V, ID = -250mAV(BR)DSS REV1.0 2 2016/12/26

P-Channel Logic Level Enhancement Mode MOSFET -63 A -1.3 V 31 nS 12 nC 1Pulse test : Pulse Width  300 msec, Duty Cycle  2％. 2Independent of operating temperature. 3Package limitation current is -51A. Qrr Forward Voltage1 VSD IF = -20A, VGS = 0V SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TJ = 25 ° C) Reverse Recovery Time trr Continuous Current3 IS IF = -20A, dlF/dt = 100A / mS Reverse Recovery Charge REV1.0 3 2016/12/26

P-Channel Logic Level Enhancement Mode MOSFET REV1.0 4 2016/12/26

P-Channel Logic Level Enhancement Mode MOSFET REV1.0 5 2016/12/26

P-Channel Logic Level Enhancement Mode MOSFET REV1.0 6 2016/12/26

P-Channel Logic Level Enhancement Mode MOSFET A. Marking Information B. Tape&Reel Information:3000pcs/Reel REV1.0 7 2016/12/26

P-Channel Logic Level Enhancement Mode MOSFET REV1.0 8 2016/12/26

P-Channel Logic Level Enhancement Mode MOSFET D.Label rule 标签内容(Label content) REV1.0 9 2016/12/26