PK5A7BA UNIKC | Alldatasheet

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P-Channel Logic Level Enhancement Mode MOSFET PRODUCT SUMMARY V(BR)DSS 100% UIS Tested 100% Rg Tested PDFN 5x6P ABSOLUTE MAXIMUM RATINGS (TA = 25 ° C Unless Otherwise Noted) W Continuous Drain Current4 Power Dissipation3 TA = 25 ° C TA = 70 ° C TA = 25 ° C TA = 70 ° C -68 PD -20 VGS LIMITS °C-55 to 150 mJ UNITS -200 V A-24 -108 -53 -19 3.5 2.2 IDM Avalanche Current IAS Operating Junction & Storage Temperature Range SYMBOL VDS Pulsed Drain Current1 140 ± 12 ID TC = 25 ° C RDS(ON) TC = 100 ° C PARAMETERS/TEST CONDITIONS Drain-Source Voltage Gate-Source Voltage 3.5mΩ @VGS = -10V -108A ID -20V TJ, TSTG TC = 25 ° C TC = 100 ° C EASAvalanche Energy L = 0.1mH REV1.3 1 2016/7/26

P-Channel Logic Level Enhancement Mode MOSFET THERMAL RESISTANCE RATINGS UNITS 1Pulse width limited by maximum junction temperature. 2The value of RqJA is measured with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA = 25° C.The value in any given application depends on the user's specific board design. 3The Power dissipation is based on RqJA t ≦10s value. 4Package limitation current is 50A. ELECTRICAL CHARACTERISTICS (TJ = 25 ° C, Unless Otherwise Noted) MIN TYP MAX -20 -0.6 -0.7 -1.1 ± 100 nA -10 2.6 3.5 3.1 4 4.3 5.7 50 S 6383 927 793 3 Ω 161 6.3 350 136 Junction-to-Case Steady-State RqJC 1.8 ° C / W Gate Resistance Rg VGS = 0V, VDS = 0V, f = 1MHz Total Gate Charge2 Gate-Drain Charge2 Gate-Source Charge2 Qgd Qgs Junction-to-Ambient2 Junction-to-Ambient2 t ≦10s 35 RqJA Qg VDS = -10V, VGS = -10V , ID = -20A STATIC MAXIMUM 50Steady-State RqJA UNITSPARAMETER V IGSS Drain-Source Breakdown Voltage VGS(th) Gate-Body Leakage VDS = VGS, ID = -250mA VDS = 0V, VGS = ± 12V SYMBOL Input Capacitance Output Capacitance Forward Transconductance1 Reverse Transfer Capacitance Crss VDS = -10V, VGS = 0V , TJ = 125 ° C VGS = -10V, ID = -20A VDS = -5V, ID = -20A Zero Gate Voltage Drain Current gfs nC VGS = 0V, VDS = -10V, f = 1MHz pF Ciss Coss VGS = -4.5V, ID = -20A VGS = -2.5V, ID = -20A uA mΩ DYNAMIC VDS = -16V, VGS = 0V LIMITS THERMAL RESISTANCE SYMBOL TYPICAL nSVDS = -10V, ID @ -20A, VGS = -10V, RGS = 6Ω Rise Time2 Turn-Off Delay Time2 td(on) tr td(off) tfFall Time2 Turn-On Delay Time2 TEST CONDITIONS Drain-Source On-State Resistance1 RDS(ON) Gate Threshold Voltage IDSS VGS = 0V, ID = -250mAV(BR)DSS REV1.3 2 2016/7/26

P-Channel Logic Level Enhancement Mode MOSFET -53 A -1.3 V 75 nS 61 nC 1Pulse test : Pulse Width  300 msec, Duty Cycle  2％. 2Independent of operating temperature. Qrr Forward Voltage1 VSD IF = -20A, VGS = 0V SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TJ = 25 ° C) Reverse Recovery Time trr Continuous Current IS IF = -20A, dlF/dt = 100A / mS Reverse Recovery Charge REV1.3 3 2016/7/26

P-Channel Logic Level Enhancement Mode MOSFET REV1.3 4 2016/7/26

P-Channel Logic Level Enhancement Mode MOSFET REV1.3 5 2016/7/26

P-Channel Logic Level Enhancement Mode MOSFET REV1.3 6 2016/7/26

P-Channel Logic Level Enhancement Mode MOSFET A. Marking Information B. Tape&Reel Information:3000pcs/Reel REV1.3 7 2016/7/26

P-Channel Logic Level Enhancement Mode MOSFET REV1.3 8 2016/7/26

P-Channel Logic Level Enhancement Mode MOSFET D.Label rule 标签内容(Label content) REV1.3 9 2016/7/26