PK552DX UNIKC | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 5

Technical content

Dual N-Channel Enhancement Mode MOSFET PRODUCT SUMMARY V(BR)DSS PDFN 5*6P ABSOLUTE MAXIMUM RATINGS (TA = 25 ° C Unless Otherwise Noted) THERMAL RESISTANCE RATINGS UNITS 1Pulse width limited by maximum junction temperature. 2The value of RqJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25° C. 3Package limitation current is 22A. Junction-to-Ambient2 Junction-to-Case 5.7mΩ @VGS = 4.5V 56A ° C / W RqJC RqJA IDRDS(ON) VGS IDM V A Drain-Source Voltage 20 LIMITS Gate-Source Voltage TA = 70 ° C TA = 25 ° C PD TC = 25 ° C TC = 100 ° C mJ Pulsed Drain Current1 20V UNITS VDS PARAMETERS/TEST CONDITIONS SYMBOL ID Power Dissipation 12.5 TA = 70 ° C Continuous Drain Current Avalanche Energy Power Dissipation TC = 100 ° C TA = 25 ° C PD Avalanche Current IAS EASL = 0.1mH TC = 25 ° C TJ, TSTG SYMBOL MAXIMUM W °C-55 to 150 TYPICAL 1.8 2.9 Continuous Drain Current3 ID THERMAL RESISTANCE Operating Junction & Storage Temperature Range REV 1.0 1 2014/7/10

Dual N-Channel Enhancement Mode MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25 ° C, Unless Otherwise Noted) MIN TYP MAX 0.3 0.7 1 ± 100 nA 4.4 5.7 4.9 6.2 100 S 4120 481 409 1 Ω VGS=2.5V 28.8 VGS=4.5V 48.2 180 24 A 1.3 V 25 nS 14 nC 1Pulse test : Pulse Width  300 msec, Duty Cycle  2%. 2Independent of operating temperature. 3Package limitation current is 22A. Reverse Recovery Time trr IF = 17A, dlF/dt = 100A /μS Total Gate Charge2 Qg Forward Voltage1 Reverse Recovery Charge VDS = 16V, VGS = 0V , Qrr td(off) tf PARAMETER SYMBOL TEST CONDITIONS IS VSD nC nSVDS = 10V, ID @ 17A, VGS= 4.5V, RGEN= 6Ω td(on) tr IF = 17A, VGS = 0V VDS = 10V, ID = 17A SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TJ = 25 ° C) UNITS Fall Time2 Turn-On Delay Time2 Turn-Off Delay Time2 Rise Time2 VGS = 2.5V, ID = 17A Qgd Qgs V Continuous Current3 STATIC mΩ Input Capacitance Output Capacitance Gate-Drain Charge2 Gate Resistance Gate-Source Charge2 Reverse Transfer Capacitance pFVGS = 0V, VDS = 10V, f = 1MHz Crss Drain-Source On-State Resistance1 RDS(ON) VGS = 4.5V, ID = 17A VDS = 5V, ID = 17AForward Transconductance1 DYNAMIC Ciss Coss Rg VGS = 0V, VDS = 0V, f = 1MHz gfs IGSS IDSS VDS = 10V, VGS = 0V , TJ = 70 ° C VDS = VGS, ID = 250mA VDS = 0V, VGS = ± 8V LIMITS VGS = 0V, ID = 250mADrain-Source Breakdown Voltage mA V(BR)DSS Zero Gate Voltage Drain Current Gate-Body Leakage VGS(th)Gate Threshold Voltage REV 1.0 2 2014/7/10

Dual N-Channel Enhancement Mode MOSFET REV 1.0 3 2014/7/10

Dual N-Channel Enhancement Mode MOSFET REV 1.0 4 2014/7/10

Dual N-Channel Enhancement Mode MOSFET *散热片形状会因为封装厂框架不同而有所差异。 REV 1.0 5 2014/7/10