PE642DT UNIKC | Alldatasheet

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Dual N-Channel Enhancement Mode MOSFET PRODUCT SUMMARY V(BR)DSS Q2 30V Q1 30V PDFN 3X3S ABSOLUTE MAXIMUM RATINGS (TA = 25 ° C Unless Otherwise Noted) THERMAL RESISTANCE RATINGS UNITS 1Pulse width limited by maximum junction temperature TJ(MAX)=150° C. 2The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25° C. The value in any given application depends on the user's specific board design. 3Package limitation current is Q2=14A , Q1=9.5A. ° C / W 7.6 W Q1 6.5 -55 to 150 Power Dissipation Power Dissipation PD PD 7.7 VDS Continuous Drain Current3 TC = 25 ° C Avalanche Current ID 34A 31A10.5mΩ @VGS = 10V 9mΩ @VGS = 10V Q2SYMBOLPARAMETERS/TEST CONDITIONS RDS(ON) ID TA = 70 ° C THERMAL RESISTANCE Operating Junction & Storage Temperature Range Pulsed Drain Current1 RqJC RqJA TJ, Tstg TA = 25 ° C SYMBOL 1.2 Junction-to-Ambient2 Junction-to-case RqJA RqJC TC = 100 ° C TC = 100 ° C Continuous Drain Current3 TA = 25 ° C Drain-Source Voltage Gate-Source Voltage TC = 25 ° C TA = 70 ° C ± 20 18.3 mJAvalanche Energy L = 0.1mH 16.7 VGS IDM EAS A ID ± 20 MAXIMUM IAS 1.7 UNITS 8.8 9.7 V 6.2 TYPICAL 1.1 REV 1.0 1 2015/6/9

Dual N-Channel Enhancement Mode MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25 ° C, Unless Otherwise Noted) MIN TYP MAX Q2 30 Q1 30 Q2 1.3 1.75 2.3 Q1 1.3 1.75 2.3 Q2 ± 100 Q1 ± 100 Q2 1 Q1 1 Q2 10 Q1 10 Q2 8 12 Q1 13 15.5 Q2 6.3 9 Q1 8.6 10.5 Q2 43 Q1 45 Q2 782 Q1 616 Q2 139 Q1 120 Q2 76 Q1 83 Q2 2.3 3.5 Q1 2.7 4 Q2 18 Q1 14 Q2 9.6 Q1 7.6 Q2 2.2 Q1 2.1 Q2 5.2 Q1 4 V Gate-Body Leakage IGSS VDS = 0V, VGS = ± 20V nA Zero Gate Voltage Drain Current IDSS VDS = 24V, VGS = 0V VDS = 20V, VGS = 0V , TJ = 55 ° C mA VGS = 10V, ID = 10A VGS = 10V, ID = 9.5A VDS = 5V, ID = 10A Drain-Source Breakdown Voltage V(BR)DSS VGS = 0V, ID = 250mA Gate Threshold Voltage VGS(th) VDS = VGS, ID = 250mA VGS = 4.5V, ID = 10A Reverse Transfer Capacitance Ciss mΩ Forward Transconductance1 gfs VDS = 5V, ID = 9.5A S Drain-Source On-State Resistance1 RDS(ON) VGS = 4.5V, ID = 9A Input Capacitance Output Capacitance pF Qg VGS = 10V Total Gate Charge2 DYNAMIC STATIC SYMBOLPARAMETER TEST CONDITIONS LIMITS Coss Crss VGS = 0V, VDS = 15V, f = 1MHz Qgs Gate-Drain Charge2 nC Qgd VDS = 15V , VGS = 10V, ID = 10A VDS = 15V , VGS = 10V, ID = 9.5A VGS = 4.5V Gate-Source Charge2 UNITS Gate Resistance Rg VGS = 0V, VDS = 0V, f = 1MHz Ω REV 1.0 2 2015/6/9

Dual N-Channel Enhancement Mode MOSFET Q2 27 Q1 18 Q2 24 Q1 24 Q2 47 Q1 44 Q2 25 Q1 23 Q2 16 Q1 17 Q2 1.2 Q1 1.1 Q2 10.5 Q1 9.3 Q2 2.8 Q1 2.2 1Pulse test : Pulse Width  300 msec, Duty Cycle  2％. 2Independent of operating temperature. 3Package limitation current is Q2=14A , Q1=9.5A. SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TJ = 25 ° C) Continuous Current3 IS A IF = 9.5A, VGS = 0V Reverse Recovery Time Reverse Recovery Charge trr Qrr IF = 10A, dlF/dt = 100A /mS IF = 9.5A, dlF/dt = 100A /mS Forward Voltage1 VSD IF = 10A, VGS = 0V nS V nC Turn-On Delay Time2 td(on) Rise Time2 tr Turn-Off Delay Time2 Fall Time2 td(off) tf VDS = 15V , ID10A, VGS = 10V, RGEN =6Ω VDS = 15V , ID 9.5A, VGS = 10V,RGEN =6Ω nS REV 1.0 3 2015/6/9

Dual N-Channel Enhancement Mode MOSFET REV 1.0 4 2015/6/9

Dual N-Channel Enhancement Mode MOSFET REV 1.0 5 2015/6/9

Dual N-Channel Enhancement Mode MOSFET REV 1.0 6 2015/6/9

Dual N-Channel Enhancement Mode MOSFET REV 1.0 7 2015/6/9

Dual N-Channel Enhancement Mode MOSFET REV 1.0 8 2015/6/9