PE5C6JZ UNIKC | Alldatasheet

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Dual N-Channel Enhancement Mode MOSFET PRODUCT SUMMARY V(BR)DSS PDFN 3X3S ABSOLUTE MAXIMUM RATINGS (TA = 25 ° C Unless Otherwise Noted) THERMAL RESISTANCE RATINGS UNITS 1Pulse width limited by maximum junction temperature. 2Package limitation current is 13A. 3The value of RqJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25° C. A V 4.5 ° C / W W Operating Junction & Storage Temperature Range SYMBOL °C-55 to 150 UNITS TYPICAL VDS 24 V mJ IDM VGS LIMITS TC = 25 ° C EAS MAXIMUM Avalanche Current IAS 28 Junction-to-Case RqJC Junction-to-Ambient3 THERMAL RESISTANCE RDS(ON) Drain-Source Voltage 5.5mΩ @VGS = 4.5V 54A Gate-Source Voltage ± 12 ID 24V PARAMETERS/TEST CONDITIONS SYMBOL TA = 70 ° C 1.6 TA= 70 ° C 13 TA = 25 ° C 2.5 TC = 100 ° C TJ, Tstg RqJA TA = 25 ° C ID Pulsed Drain Current1 Continuous Drain Current2 Power Dissipation PD Avalanche Energy L =0.1mH TC = 25 ° C TC = 100 ° C REV 1.0 1 2016/7/20

Dual N-Channel Enhancement Mode MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25 ° C, Unless Otherwise Noted) MIN TYP MAX 0.6 0.9 1.2 ± 10 uA 3.6 4.6 5.5 3.9 4.9 6 4.3 5.3 6.9 5 6 8.5 24 S 1774 327 267 1.8 Ω 21.4 2.2 22 A 1.2 V 28 nS 13 nC 1Pulse test : Pulse Width  300 msec, Duty Cycle  2％. 2Independent of operating temperature. 3Package limitation current is 13A. V Zero Gate Voltage Drain Current IGSS VDS = VGS, ID = 250mA VGS = 0V, ID = 250mA Gate-Body Leakage VGS(th) IF = 3A, dlF/dt = 100A / mS VGS = 3.8V, ID = 3A VGS = 3.1V, ID = 3A Drain-Source Breakdown Voltage VGS = 4.5V, ID = 3A V(BR)DSS TEST CONDITIONS Ciss VDS = 5V, ID = 3A VDS = 0V, VGS = ± 10V gfs RDS(ON) STATIC nC VGS = 0V, VDS = 0V, f = 1MHz Qgs mA DYNAMIC mΩ VDS = 20V, VGS = 0V UNITS Qgd pF IDSS QrrReverse Recovery Charge Continuous Current3 Forward Voltage1 Reverse Recovery Time IS VSD trr IF = 3A, VGS = 0V nSVDD= 12V, ID @ 3A, VGEN = 4.5V, RG= 6Ω SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TJ = 25 ° C) td(on) tr td(off) tf Turn-On Delay Time2 Rise Time2 Turn-Off Delay Time2 Fall Time2 Gate-Drain Charge2 Gate-Source Charge2 Reverse Transfer Capacitance Gate Resistance LIMITS VDS = 12V , ID = 3A Total Gate Charge2 Qg(VGS=4.5V) Qg(VGS=3.9V) Crss Input Capacitance VGS = 0V, VDS = 12V, f = 1MHz Rg Coss PARAMETER Output Capacitance VGS = 2.5V, ID = 3A VDS = 20V, VGS = 0V, TJ = 125 ° C SYMBOL Gate Threshold Voltage Drain-Source On-State Resistance1 Forward Transconductance1 REV 1.0 2 2016/7/20

Dual N-Channel Enhancement Mode MOSFET REV 1.0 3 2016/7/20

Dual N-Channel Enhancement Mode MOSFET REV 1.0 4 2016/7/20

Dual N-Channel Enhancement Mode MOSFET REV 1.0 5 2016/7/20

Dual N-Channel Enhancement Mode MOSFET A. Marking Information(此产品代码为：K2) B. Tape&Reel Information:5000pcs/Reel REV 1.0 6 2016/7/20

Dual N-Channel Enhancement Mode MOSFET REV 1.0 7 2016/7/20

Dual N-Channel Enhancement Mode MOSFET D.Label rule 标签内容(Label content) REV 1.0 8 2016/7/20