PE5B7BA UNIKC | Alldatasheet

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P-Channel Logic Level Enhancement Mode MOSFET PRODUCT SUMMARY V(BR)DSS PDFN 3x3P ABSOLUTE MAXIMUM RATINGS (TA = 25 ° C Unless Otherwise Noted) W Continuous Drain Current4 Power Dissipation3 TA = 25 ° C TA = 70 ° C TA = 25 ° C TA = 70 ° C LIMITS -11.5 3.5 2.2 SYMBOL -49 -39 -31 PD -20 VGS °C-55 to 150 mJ UNITS -75 V A-14.4 IDM Avalanche Current IAS Junction & Storage Temperature Range VDS Pulsed Drain Current1 ± 12 ID TC = 25 ° C TJ, TSTG RDS(ON) TC = 100 ° C PARAMETERS/TEST CONDITIONS Drain-Source Voltage Gate-Source Voltage 10mΩ @VGS = -4.5V -49A ID -20V TC = 25 ° C TC = 100 ° C EASAvalanche Energy L = 0.1mH REV1.0 1 2017/4/11

P-Channel Logic Level Enhancement Mode MOSFET THERMAL RESISTANCE RATINGS UNITS 1Pulse width limited by maximum junction temperature. 2The value of RqJA is measured with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA = 25° C. 3The Power dissipation is based on RqJA t ≦10s value. 4Package limitation current is -33A. ELECTRICAL CHARACTERISTICS (TJ = 25 ° C, Unless Otherwise Noted) MIN TYP MAX -20 -0.6 -0.8 -1.2 ± 100 nA -10 9.4 13 6.6 10 60 S 3107 422 360 3.2 Ω 4.3 145 122 163 RqJC 3 ° C / W t ≦10sJunction-to-Ambient2 Steady-StateJunction-to-Case Gate Resistance Rg VGS = 0V, VDS = 0V, f = 1MHz Total Gate Charge2 Qg(VGS=-4.5V) Gate-Drain Charge2 Gate-Source Charge2 Qgd Qgs tr Qg(VGS=-2.5V) VDS = -10V, ID = -12A STATIC UNITSPARAMETER V IGSS RqJA MAXIMUM SYMBOL V(BR)DSS VGS = -2.5V, ID = -12A VDS = -5V, ID = -12A Zero Gate Voltage Drain Current gfs Drain-Source Breakdown Voltage VGS(th) Gate-Body Leakage VDS = VGS, ID = -250mA VDS = 0V, VGS = ± 12V nC VGS = 0V, VDS = -10V, f = 1MHz pF Ciss Coss VGS = -4.5V, ID = -12A Crss mA mΩ DYNAMIC VDS = -16V, VGS = 0V LIMITS THERMAL RESISTANCE SYMBOL TYPICAL nSVDD = -10V, ID @ -12A, VGS = -4.5V, RGEN = 6Ω Rise Time2 Turn-Off Delay Time2 td(on) tfFall Time2 Turn-On Delay Time2 TEST CONDITIONS Drain-Source On-State Resistance1 RDS(ON) Gate Threshold Voltage IDSS VGS = 0V, ID = -250mA Input Capacitance Junction-to-Ambient2 Steady-State RqJA 55 td(off) Output Capacitance Forward Transconductance1 Reverse Transfer Capacitance VDS = -10V, VGS = 0V , TJ = 55 ° C REV1.0 2 2017/4/11

P-Channel Logic Level Enhancement Mode MOSFET -34 A -1.2 V 40 nS 24 nC 1Pulse test : Pulse Width  300 msec, Duty Cycle  2％. 2Independent of operating temperature. 3Package limitation current is -33A. Qrr Forward Voltage1 VSD IF = -12A, VGS = 0V SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TJ = 25 ° C) Reverse Recovery Time trr Continuous Current3 IS IF = -12A, dl/dt = 100A / mS Reverse Recovery Charge REV1.0 3 2017/4/11

P-Channel Logic Level Enhancement Mode MOSFET REV1.0 4 2017/4/11

P-Channel Logic Level Enhancement Mode MOSFET REV1.0 5 2017/4/11

P-Channel Logic Level Enhancement Mode MOSFET REV1.0 6 2017/4/11

P-Channel Logic Level Enhancement Mode MOSFET A. Marking Information(此产品代码为：M9） B. Tape&Reel Information:5000pcs/Reel REV1.0 7 2017/4/11

P-Channel Logic Level Enhancement Mode MOSFET REV1.0 8 2017/4/11

P-Channel Logic Level Enhancement Mode MOSFET D.Label rule 标签内容(Label content) REV1.0 9 2017/4/11