PE5B5DX UNIKC | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 9

Technical content

Dual P-Channel Enhancement Mode MOSFET PRODUCT SUMMARY V(BR)DSS PDFN 3x3P ABSOLUTE MAXIMUM RATINGS (TA = 25 ° C Unless Otherwise Noted) THERMAL RESISTANCE RATINGS UNITS 1Pulse width limited by maximum junction temperature. 3The Power dissipation is based on RqJA t ≦10s value. 3Package limitation current is -9A. Steady-State t ≦10s Steady-State Drain-Source Voltage VDS -20 V RqJA 72 ° C / W Junction-to-Case Junction-to-Ambient2 Junction-to-Ambient2 TC = 100 ° C TA = 25 ° C -19 -8.8 TC = 100 ° C TA = 25 ° C 2.5 TC= 25 ° C SYMBOL -30 LIMITS VGS ID UNITS A -40 ± 12 RqJA Pulsed Drain Current1 ID TC= 25 ° C -20V Continuous Drain Current TA= 70 ° C PARAMETERS/TEST CONDITIONS RDS(ON) 20mΩ @VGS = -10V -30A Gate-Source Voltage THERMAL RESISTANCE TYPICAL PDPower Dissipation3 Tj, Tstg MAXIMUM W 1.6 -55 to 150 IDM Avalanche Current IAS -21.5 Operating Junction & Storage Temperature Range SYMBOL 4.3 RqJC 2The value of RqJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Coppe. Avalanche Energy L = 0.1mH EAS 23 mJ TA= 70° C REV 1.0 1 2017/10/11

Dual P-Channel Enhancement Mode MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25 ° C, Unless Otherwise Noted) MIN TYP MAX -20 -0.65 -0.77 -1.2 ± 100 nA -10 26 35 19 25 16 20 17 S 1275 179 161 9.5 Ω 1.5 4.7 153 -24 A -1.2 V 13 nS 5.5 nC 1Pulse test : Pulse Width  300 msec, Duty Cycle  2％. 2Independent of operating temperature. 3Package limitation current is -9A. Gate-Body Leakage IGSS VDS = 0V, VGS = ± 12V PARAMETER Zero Gate Voltage Drain Current V(BR)DSS STATIC VDS = -10V, VGS = 0V, TJ = 55° C Turn-Off Delay Time2 IF = -2.5A, dlF/dt = 100A / mS IDSS Coss Crss SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TJ = 25 ° C) mΩ IF = -2.5A, VGS = 0V Gate-Drain Charge2 VDD = -10V, ID @ -2.5A, VGEN = -10V, RG = 6Ω Gate Resistance nS VDS = VGS, ID = -250mA VGS = 0V, ID = -250mA nC Qgd Rg td(on) td(off) Drain-Source On-State Resistance1 RDS(ON) tr Turn-On Delay Time2 Rise Time2 DYNAMIC VGS = 0V, VDS = 0V, f = 1MHz QrrReverse Recovery Charge Continuous Current3 Forward Voltage1 Reverse Recovery Time tf VSD IS trr Fall Time2 VDS = -10V , VDS = -10V , ID = -2.5AQgs SYMBOL VDS = -16V, VGS = 0V VGS = -10V, ID = -2.5A Forward Transconductance1 Gate-Source Charge2 Reverse Transfer Capacitance Qg Input Capacitance Total Gate Charge2 Ciss Output Capacitance mA LIMITS Drain-Source Breakdown Voltage V pFVGS = 0V, VDS = -10V, f = 1MHz Gate Threshold Voltage gfs VGS(th) UNITS VDS = -10V, ID = -2.5A TEST CONDITIONS VGS = -4.5V, ID = -2.5A VGS = -2.5V, ID = -2A REV 1.0 2 2017/10/11

Dual P-Channel Enhancement Mode MOSFET REV 1.0 3 2017/10/11

Dual P-Channel Enhancement Mode MOSFET REV 1.0 4 2017/10/11

Dual P-Channel Enhancement Mode MOSFET REV 1.0 5 2017/10/11

Dual P-Channel Enhancement Mode MOSFET *因为各家封装模具不同而外观略有所差异，不影响电性及Layout。 REV 1.0 6 2017/10/11

Dual P-Channel Enhancement Mode MOSFET A. Marking Information(此产品代码为：P8） B. Tape&Reel Information:5000pcs/Reel REV 1.0 7 2017/10/11

Dual P-Channel Enhancement Mode MOSFET REV 1.0 8 2017/10/11

Dual P-Channel Enhancement Mode MOSFET D.Label rule 标签内容(Label content) REV 1.0 9 2017/10/11