PE551BA UNIKC | Alldatasheet

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P-Channel Logic Level Enhancement Mode MOSFET PRODUCT SUMMARY V(BR)DSS PDFN 3x3P ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted) RDS(ON) 20mΩ @VGS = -10V -22A ID -30V REV1.0 1 2016/6/22 ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted) W Continuous Drain Current3 Power Dissipation TA = 25 °C TA = 70 °C TA = 25 °C TA = 70 °C -14 PD -30 VGS LIMITS °C-55 to 150 mJ UNITS -40 V A-7 -22 -23 -5.8 1.9 1.2 IDM Avalanche Current IAS Junction & Storage Temperature Range SYMBOL VDS Pulsed Drain Current1 ±25 ID TC = 25 °C TC = 100 °C PARAMETERS/TEST CONDITIONS Drain-Source Voltage Gate-Source Voltage TJ, TSTG TC = 25 °C TC = 100 °C EASAvalanche Energy L = 0.1mH REV1.0 1 2016/6/22

P-Channel Logic Level Enhancement Mode MOSFET THERMAL RESISTANCE RATINGS UNITS 1Pulse width limited by maximum junction temperature. 2The value of RqJA is measured with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA = 25°C. 3Package limitation current is -21A. ELECTRICAL CHARACTERISTICS (TJ = 25 °C, Unless Otherwise Noted) MIN TYP MAX -30 -1 -1.6 -3 ±100 nA RqJC 7.2 °C / WJunction-to-Ambient2 Junction-to-Case STATIC MAXIMUM RqJA UNITSPARAMETER V I Drain-Source Breakdown Voltage VGS(th) Gate-Body Leakage VDS = VGS, ID = -250mA V = 0V, V = ±25V SYMBOL LIMITS THERMAL RESISTANCE SYMBOL TYPICAL TEST CONDITIONS Gate Threshold Voltage VGS = 0V, ID = -250mAV(BR)DSS REV1.0 2 2016/6/22 ±100 nA -10 15 20 23 30 25 S 1009 154 121 8 Ω Gate Resistance Rg VGS = 0V, VDS = 0V, f = 1MHz Total Gate Charge2 Qg(VGS=-4.5V) Gate-Drain Charge2 Gate-Source Charge2 Qgd Qgs Qg(VGS=-10V) VDS = -15V, ID = -7A IGSSGate-Body Leakage VDS = 0V, VGS = ±25V Input Capacitance Output Capacitance Forward Transconductance1 Reverse Transfer Capacitance Crss VDS = -20V, VGS = 0V , TJ = 55 °C VGS = -10V, ID = -7A VDS = -10V, ID = -7A Zero Gate Voltage Drain Current gfs nC VGS = 0V, VDS = -15V, f = 1MHz pF Ciss Coss VGS = -4.5V, ID = -7A mA mΩ DYNAMIC VDS = -24V, VGS = 0V nSVDD = -15V, ID @ -7A, VGS = -10V, RGEN = 6Ω Rise Time2 Turn-Off Delay Time2 td(on) tr td(off) tfFall Time2 Turn-On Delay Time2 Drain-Source On-State Resistance1 RDS(ON) IDSS REV1.0 2 2016/6/22

P-Channel Logic Level Enhancement Mode MOSFET -13 A -1.3 V 11 nS 3 nC 1Pulse test : Pulse Width  300 msec, Duty Cycle  2％. 2Independent of operating temperature. Qrr Forward Voltage1 VSD IF = -7A, VGS = 0V SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TJ = 25 °C) Reverse Recovery Time trr Continuous Current IS IF = -7A, dlF/dt = 100A / mS Reverse Recovery Charge REV1.0 3 2016/6/22REV1.0 3 2016/6/22

P-Channel Logic Level Enhancement Mode MOSFET REV1.0 4 2016/6/22 REV1.0 4 2016/6/22

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P-Channel Logic Level Enhancement Mode MOSFET A. Marking Information(此产品代码为：K1） B. Tape&Reel Information:5000pcs/Reel REV1.0 7 2016/6/22 B. Tape&Reel Information:5000pcs/Reel REV1.0 7 2016/6/22

P-Channel Logic Level Enhancement Mode MOSFET REV1.0 8 2016/6/22 REV1.0 8 2016/6/22

P-Channel Logic Level Enhancement Mode MOSFET D.Label rule 标签内容(Label content) REV1.0 9 2016/6/22 REV1.0 9 2016/6/22