PE532DX UNIKC | Alldatasheet

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Dual N-Channel Enhancement Mode MOSFET PRODUCT SUMMARY V(BR)DSS PDFN 3x3P ABSOLUTE MAXIMUM RATINGS (TA = 25 ° C Unless Otherwise Noted) THERMAL RESISTANCE RATINGS UNITS 1Pulse width limited by maximum junction temperature. 3Package limitation current is 9A. Drain-Source Voltage VDS 30 V TC = 100 ° C TA = 25 ° C 7.5 TC = 100 ° C TA = 25 ° C 1.7 TC= 25 ° C SYMBOL LIMITS VGS ID UNITS A ± 20 RqJA Pulsed Drain Current1 Junction-to-Ambient2 ID TC= 25 ° C 30V Continuous Drain Current3 TA= 70 ° C PARAMETERS/TEST CONDITIONS RDS(ON) 19mΩ @VGS = 10V 21A Gate-Source Voltage THERMAL RESISTANCE TYPICAL PDPower Dissipation Tj, Tstg MAXIMUM W 1.1 -55 to 150 IDM Avalanche Current IAS 17 ° C / W Operating Junction & Storage Temperature Range SYMBOL 8.5 Junction-to-Case RqJC 2The value of RqJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25° C. Avalanche Energy L = 0.1mH EAS 15 mJ TA= 70° C REV 1.0 1 2016/12/19

Dual N-Channel Enhancement Mode MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25 ° C, Unless Otherwise Noted) MIN TYP MAX 1 1.5 2.5 ± 100 nA 25 A 19.8 25 16.8 19 22 S 520 2.2 Ω 7.8 3.6 21 A 1 V 12 nS 3 nC 1Pulse test : Pulse Width  300 msec, Duty Cycle  2％. 2Independent of operating temperature. 3Package limitation current is 9A. mA On-State Drain Current1 ID(ON) VDS = 5V, VGS = 10V PARAMETER Zero Gate Voltage Drain Current IGSS V(BR)DSS STATIC VDS = 20V, VGS = 0V, TJ = 55° C Turn-Off Delay Time2 IF = 7.5A, dlF/dt = 100A / mS VDS = 0V, VGS = ± 20V IDSS Coss Crss SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TJ = 25 ° C) mΩ IF = 7.5A, VGS = 0V Gate-Drain Charge2 VDD = 15V, ID @ 7.5A, VGEN = 10V, RG = 6Ω nS VDS = VGS, ID = 250mA VGS = 0V, ID = 250mA nC Qgd Gate Resistance td(on) td(off) Drain-Source On-State Resistance1 RDS(ON) tr Turn-On Delay Time2 Rise Time2 DYNAMIC QrrReverse Recovery Charge Continuous Current3 Forward Voltage1 Reverse Recovery Time tf VSD IS trr Fall Time2 VDS = 15V,ID = 7.5AQgs SYMBOL VDS = 24V, VGS = 0V VGS = 10V, ID = 7.5A Forward Transconductance1 Gate-Source Charge2 Reverse Transfer Capacitance Qg(VGS = 4.5V) Input Capacitance Total Gate Charge2 Qg(VGS = 10V) Ciss Output Capacitance Rg LIMITS Drain-Source Breakdown Voltage V pFVGS = 0V, VDS = 15V, f = 1MHz Gate Threshold Voltage VGS = 0V, VDS = 0V, f = 1MHz gfs Gate-Body Leakage VGS(th) UNITS VDS = 10V, ID = 7.5A TEST CONDITIONS VGS = 4.5V, ID = 6.8A REV 1.0 2 2016/12/19

Dual N-Channel Enhancement Mode MOSFET REV 1.0 3 2016/12/19

Dual N-Channel Enhancement Mode MOSFET REV 1.0 4 2016/12/19

Dual N-Channel Enhancement Mode MOSFET *因为各家封装模具不同而外观略有所差异，不影响电性及Layout。 REV 1.0 5 2016/12/19

Dual N-Channel Enhancement Mode MOSFET A. Marking Information(此产品代码为：E7） B. Tape&Reel Information:5000pcs/Reel REV 1.0 6 2016/12/19

Dual N-Channel Enhancement Mode MOSFET REV 1.0 7 2016/12/19

Dual N-Channel Enhancement Mode MOSFET D.Label rule 标签内容(Label content) REV 1.0 8 2016/12/19