PE529BA

PE529BA UNIKC | Alldatasheet

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P-Channel Logic Level Enhancement Mode MOSFET PRODUCT SUMMARY V(BR)DSS PDFN 3X3P ABSOLUTE MAXIMUM RATINGS (TA = 25 ° C Unless Otherwise Noted) THERMAL RESISTANCE RATINGS UNITS 1Pulse width limited by maximum junction temperature. 2The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25° C. 3Package limitation current is 22A. Continuous Drain Current3 Power Dissipation PD TC = 100 ° C TJ, Tstg RqJA TA = 70 ° C 1.5 TA= 70 ° C -9.8 TA = 25 ° C 2.3 ID Tc = 25 ° C -20V Tc = 100 ° C PARAMETERS/TEST CONDITIONS RDS(ON) Drain-Source Voltage 9.5mΩ @VGS = -4.5V -34A Gate-Source Voltage Junction-to-Ambient2 THERMAL RESISTANCE Avalanche Energy L =0.1mH IAS -39 Junction-to-Case RqJC IDM VGS LIMITS TC = 25 ° C EAS MAXIMUM Avalanche Current UNITS -21 TYPICAL VDS -20 SYMBOL -12 W Junction & Storage Temperature Range SYMBOL °C-55 to 150 TA = 25 ° C ID Pulsed Drain Current1 7 ° C / W 17.8 -34 -100 mJ V A REV 1.0 1 2014/7/16

P-Channel Logic Level Enhancement Mode MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25 ° C, Unless Otherwise Noted) MIN TYP MAX -20 -0.3 -0.6 -1 ± 100 nA -10 7.3 9.5 8.8 12.5 11 18 60 S 4480 429 326 4 Ω 6.6 196 125 -14 A -1.2 V 12.8 nS 4.5 nC 1Pulse test : Pulse Width  300 msec, Duty Cycle  2％. 2Independent of operating temperature. Input Capacitance VGS = 0V, VDS = -10V, f = 1MHz PARAMETER Output Capacitance VGS = -1.8V , ID = -11A VDS = -10V, VGS = 0V, TJ = 55 ° C SYMBOL Gate-Drain Charge2 Gate-Source Charge2 Reverse Transfer Capacitance Gate Resistance Qg(VGS=-4.5V) Crss LIMITS VDS = -10V ,ID = -12A Rise Time2 Turn-Off Delay Time2 Fall Time2 Gate Threshold Voltage Drain-Source On-State Resistance1 Rg IF = -12A, VGS = 0V nSVDD= -10V, ID @ -12A, VGS = -10V, RGEN= 6Ω SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TJ = 25 ° C) td(on) tr td(off) tf Turn-On Delay Time2 pF IDSS QrrReverse Recovery Charge Continuous Current Forward Voltage1 Reverse Recovery Time IS VSD trr STATIC nC VGS = 0V, VDS = 0V, f = 1MHz Qgs mA DYNAMIC mΩ VDS = -16V, VGS = 0V Qgd Ciss VDS = -10V, ID = -12A VDS = 0V, VGS = ± 8V gfs RDS(ON) Forward Transconductance1 V(BR)DSS TEST CONDITIONS Coss Drain-Source Breakdown Voltage V VGS = -4.5V, ID =-12A IF = -12A, dlF/dt = 100A / μS UNITS VGS(th) VGS = -2.5V, ID = -12A Total Gate Charge2 Qg(VGS=-2.5V) Zero Gate Voltage Drain Current IGSS VDS = VGS, ID = -250mA VGS = 0V, ID = -250mA Gate-Body Leakage REV 1.0 2 2014/7/16

P-Channel Logic Level Enhancement Mode MOSFET REV 1.0 3 2014/7/16

P-Channel Logic Level Enhancement Mode MOSFET REV 1.0 4 2014/7/16

P-Channel Logic Level Enhancement Mode MOSFET REV 1.0 5 2014/7/16