PE507BA

PE507BA UNIKC | Alldatasheet

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P-Channel Logic Level Enhancement Mode MOSFET PRODUCT SUMMARY V(BR)DSS PDFN 3X3P ABSOLUTE MAXIMUM RATINGS (TA = 25 ° C Unless Otherwise Noted) THERMAL RESISTANCE RATINGS UNITS 1Pulse width limited by maximum junction temperature. 2The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25° C. 3Package limitation current is 22A. A TA = 25 ° C ID Pulsed Drain Current1 V 7.5 ° C / W -28 -50 mJ -10 W Junction & Storage Temperature Range SYMBOL °C-55 to 150 UNITS -18 TYPICAL VDS -30 V SYMBOL IDM VGS LIMITS TC = 25 ° C EAS MAXIMUM Avalanche Current IAS -42 Junction-to-Case RqJC Junction-to-Ambient2 THERMAL RESISTANCE Avalanche Energy L =0.1mH ID Tc = 25 ° C -30V Tc = 100 ° C PARAMETERS/TEST CONDITIONS RDS(ON) Drain-Source Voltage 14mΩ @VGS = -10V -28A Gate-Source Voltage ± 25 TA = 70 ° C 1.3 TA= 70 ° C -8 TA = 25 ° C 2 RqJA Continuous Drain Current3 Power Dissipation PD TC = 100 ° C TJ, Tstg REV 1.1 1 2015/3/24

P-Channel Logic Level Enhancement Mode MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25 ° C, Unless Otherwise Noted) MIN TYP MAX -30 -1 -1.5 -3 ± 100 nA -10 14.5 22 9.6 14 32 S 2100 365 327 3 Ω 49.1 12.3 -23 A -1.2 V 20.5 nS 8.3 mC 1Pulse test : Pulse Width  300 msec, Duty Cycle  2％. 2Independent of operating temperature. Zero Gate Voltage Drain Current IGSS VDS = VGS, ID = -250mA VGS = 0V, ID = -250mA Gate-Body Leakage VGS(th) IF = -10A, dl/dt = 100A / μS UNITS Coss Drain-Source Breakdown Voltage V VGS = -4.5V, ID =-9A V(BR)DSS TEST CONDITIONS Ciss VDS = -10V, ID = -10A VDS = 0V, VGS = ± 25V gfs RDS(ON) Forward Transconductance1 STATIC nC VGS = 0V, VDS = 0V, f = 1MHz Qgs mA DYNAMIC mΩ VDS = -24V, VGS = 0V Qgd pF IDSS QrrReverse Recovery Charge Continuous Current Forward Voltage1 Reverse Recovery Time IS VSD trr IF = -10A, VGS = 0V nSVDD= -15V, ID @ -10A, VGS = -10V, RGEN= 6Ω SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TJ = 25 ° C) td(on) tr td(off) tf Turn-On Delay Time2 Rise Time2 Turn-Off Delay Time2 Fall Time2 Gate Threshold Voltage Drain-Source On-State Resistance1 Rg LIMITS VDS = -15V , VGS = -10V, ID = -10A VDS = -20V, VGS = 0V, TJ = 55 ° C SYMBOL Gate-Drain Charge2 Gate-Source Charge2 Reverse Transfer Capacitance Gate Resistance Total Gate Charge2 Qg Crss Input Capacitance VGS = 0V, VDS = -15V, f = 1MHz PARAMETER Output Capacitance VGS = -10V , ID = -10A REV 1.1 2 2015/3/24

P-Channel Logic Level Enhancement Mode MOSFET REV 1.1 3 2015/3/24

P-Channel Logic Level Enhancement Mode MOSFET REV 1.1 4 2015/3/24

P-Channel Logic Level Enhancement Mode MOSFET REV 1.1 5 2015/3/24