PD537BA UNIKC | Alldatasheet

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P-Channel Enhancement Mode MOSFET PRODUCT SUMMARY V(BR)DSS TO-252 ABSOLUTE MAXIMUM RATINGS (TA = 25 ° C Unless Otherwise Noted) THERMAL RESISTANCE RATINGS UNITS 1Pulse width limited by maximum junction temperature. 2Package limitation current is -55A. W29 1.7 Avalanche Energy L = 0.1mH EAS 64.8 mJ 62.5 ° C / W IDM Avalanche Current IAS 36 TC= 100° C Junction & Storage Temperature Range SYMBOL Junction-to-Case RqJC Power Dissipation Tj, Tstg MAXIMUM -55 to 150 PD Continuous Drain Current2 TC= 100 ° C PARAMETERS/TEST CONDITIONS 8mΩ @VGS = -10V 71A Drain-Source Voltage Pulsed Drain Current1 Gate-Source Voltage THERMAL RESISTANCE RDS(ON) Junction-to-Ambient TYPICA L ID TC= 25 ° C -30V A TC= 25 ° C RqJA VDS ID V UNITS 160 -30 ± 25 SYMBOL LIMITS VVGS REV 1.1 1 2015/7/22

P-Channel Enhancement Mode MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25 ° C, Unless Otherwise Noted) MIN TYP MAX -30 -1 -1.6 -3 ± 100 nA -10 9.6 14 6.5 8 49 S 2464 374 271 3.8 Ω 8.3 -56 A -1.3 V 26 nS 13 nC 1Pulse test : Pulse Width  300 msec, Duty Cycle  2%. 2Independent of operating temperature. 3Package limitation current is -55A. Gate-Body Leakage VDS = -5V, ID = -20A TEST CONDITIONS IGSS Forward Transconductance1 VDS =-20V, VGS = 0V, TJ = 125° C VGS =-4.5V, ID =-20A VGS(th) PARAMETER Zero Gate Voltage Drain Current gfs VGS = 0V, VDS = -15V, f = 1MHz SYMBOL Output Capacitance DYNAMIC VGS =-10V, ID =-20A Qgs pF Gate-Source Charge2 Reverse Transfer Capacitance Qg(VGS = -10V) Input Capacitance Total Gate Charge2 Rise Time2 Qgd QrrReverse Recovery Charge Continuous Current3 Forward Voltage1 Reverse Recovery Time Fall Time2 tr VDS =-15V, ID = -20A VDS =-24V, VGS = 0V mA Turn-On Delay Time2 Drain-Source On-State Resistance1 RDS(ON) VGS =0V, VDS = 0V, f = 1MHz tf VSD nS VDS = VGS, ID = -250mA VGS = 0V, ID = -250mA nC Qg(VGS = -4.5V) Ciss SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TJ = 25 ° C) Turn-Off Delay Time2 Gate-Drain Charge2 VDS =-15V ,ID @ -20A, VGS=-10V,RGEN=6Ω td(on) V(BR)DSS Gate Threshold Voltage Gate Resistance STATIC Drain-Source Breakdown Voltage IS trr Rg mΩ IF = -20A, VGS = 0V V LIMITS UNITS IF = -20A, dlF/dt = 100A /mS VDS = 0V, VGS = ± 25V IDSS Coss Crss td(off) REV 1.1 2 2015/7/22

P-Channel Enhancement Mode MOSFET REV 1.1 3 2015/7/22

P-Channel Enhancement Mode MOSFET REV 1.1 4 2015/7/22

P-Channel Enhancement Mode MOSFET *因为各家封装模具不同而外观略有所差异,不影响电性及Layout。 REV 1.1 5 2015/7/22

P-Channel Enhancement Mode MOSFET A. Marking Information B. Tape&Reel Information:2500pcs/Reel REV 1.1 6 2015/7/22

P-Channel Enhancement Mode MOSFET REV 1.1 7 2015/7/22

P-Channel Enhancement Mode MOSFET D.Label rule 标签内容(Label content) REV 1.1 8 2015/7/22