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Dual N-Channel Logic Level Enhancement Mode MOSFET PRODUCT SUMMARY V(BR)DSS SOT-23-6 ABSOLUTE MAXIMUM RATINGS (TA = 25 ° C Unless Otherwise Noted) THERMAL RESISTANCE RATINGS UNITS ° C / W 1Limited by maximum junction temperature. 2 Limited by package. SYMBOL Pulsed Drain Current1,2 MAXIMUMTHERMAL RESISTANCE Operating Junction & Storage Temperature Range SYMBOL PD TJ, TSTG VGS TA = 25 ° C RDS(ON) TA = 70 ° C PARAMETERS/TEST CONDITIONS Gate-Source Voltage 300mΩ @VGS = 4.5V 0.96A ID 20V Continuous Drain Current2 TA = 25 ° C RqJA 251 ± 10 V ID IDM TYPICAL 0.31 -55 to 150 0.96 A LIMITS 0.49 Junction-to-Ambient TA = 70 ° C Power Dissipation W UNITS 0.76 REV 1.0 1 2017/11/20

Dual N-Channel Logic Level Enhancement Mode MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25 ° C, Unless Otherwise Noted) MIN TYP MAX 0.4 0.7 1 ± 30 mA 144 300 186 400 252 700 2.5 S 1.1 0.2 0.3 173 0.25 A 1.2 V 111 nS 102 uC 1Pulse test : Pulse Width  300 msec, Duty Cycle  2％. 2Independent of operating temperature. STATIC LIMITS Forward Voltage1 VSD IF = 0.5A, VGS = 0V tr IS Total Gate Charge2 Turn-Off Delay Time2 VDD = 10V ID @ 0.5A, VGS = 4.5V, RGEN = 5.1Ω Reverse Recovery Time trr IF = 1A, dI/dt=100A/ms Qg Qgs Qgd td(on) Continuous Current Reverse Recovery Charge Qrr nC nS SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICE ( TJ = 25 °C ) Fall Time2 td(off) tf Gate-Drain Charge2 Turn-On Delay Time2 Rise Time2 VGS = 4.5V , VDS = 20V, ID = 1A Input Capacitance Output Capacitance Reverse Transfer Capacitance Crss VGS = 0V, VDS = 10V, f = 1MHz Gate-Source Charge2 UNITSPARAMETER SYMBOL TEST CONDITIONS gfs pF Ciss Coss VGS(th) VDS = 5V, ID = 0.5A DYNAMIC VGS = 2.5V, ID = 0.25A V IGSS IDSS mA Drain-Source Breakdown Voltage VGS = 4.5V, ID = 0.5A mΩ VDS = 10V, VGS = 0V , TJ = 125 ° C VDS = VGS, ID = 250mAGate Threshold Voltage Forward Transconductance1 VGS = 0V, ID = 250mAV(BR)DSS Zero Gate Voltage Drain Current Gate-Body Leakage VDS = 0V, VGS = ± 8V VDS = 16V, VGS = 0V Drain-Source On-State Resistance1 RDS(ON) VGS = 1.8V, ID = 0.2A REV 1.0 2 2017/11/20

Dual N-Channel Logic Level Enhancement Mode MOSFET REV 1.0 3 2017/11/20

Dual N-Channel Logic Level Enhancement Mode MOSFET REV 1.0 4 2017/11/20

Dual N-Channel Logic Level Enhancement Mode MOSFET REV 1.0 5 2017/11/20

Dual N-Channel Logic Level Enhancement Mode MOSFET A. Marking Information ( 此产品代码为：37) B. Tape&Reel Information:3000pcs/Reel REV 1.0 6 2017/11/20

Dual N-Channel Logic Level Enhancement Mode MOSFET REV 1.0 7 2017/11/20

Dual N-Channel Logic Level Enhancement Mode MOSFET D.Label rule 标签内容(Label content) REV 1.0 8 2017/11/20