PA567JA UNIKC | Alldatasheet
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Dual P-Channel Logic Level Enhancement Mode MOSFET PRODUCT SUMMARY V(BR)DSS SOT-23-6 ABSOLUTE MAXIMUM RATINGS (TA = 25 ° C Unless Otherwise Noted) THERMAL RESISTANCE RATINGS UNITS ° C / W 1Pulse width limited by maximum junction temperature. 2 The value of RqJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper. SYMBOL Pulsed Drain Current1 MAXIMUMTHERMAL RESISTANCE Operating Junction & Storage Temperature Range SYMBOL PD TJ, TSTG VGS TA = 25 ° C RDS(ON) TA = 70 ° C PARAMETERS/TEST CONDITIONS Gate-Source Voltage 520mΩ @VGS = -4.5V -0.68A ID -20V Continuous Drain Current TA = 25 ° C RqJA 300Junction-to-Ambient2 Steady-State V ID IDM TYPICAL 0.26 -55 to 150 -0.68 A LIMITS 0.41 TA = 70 ° C Power Dissipation W UNITS -2.1 -0.54 ± 12 REV 1.0 1 2017/12/5
Dual P-Channel Logic Level Enhancement Mode MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25 ° C, Unless Otherwise Noted) MIN TYP MAX -20 -0.4 -0.65 -1.2 ± 30 uA -10 442 520 618 800 1 S 9.6 1.1 0.2 0.3 -0.34 A -1.2 V 46 nS 28 nC 1Pulse test : Pulse Width 300 msec, Duty Cycle 2％. 2Independent of operating temperature. STATIC LIMITS Forward Voltage1 VSD IF = -0.45A, VGS = 0V tr IS Total Gate Charge2 Turn-Off Delay Time2 VDD = -10V ID @ -0.45A, VGS = -4.5V, RG = 5.1Ω Reverse Recovery Time trr IF = -1A, dIF/dt=100A/ms Qg Qgs Qgd td(on) Continuous Current Reverse Recovery Charge Qrr nC nS SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICE ( TJ = 25 °C ) Fall Time2 td(off) tf Gate-Drain Charge2 Turn-On Delay Time2 Rise Time2 VGS = -4.5V , VDS = -20V, ID = -1A Input Capacitance Output Capacitance Reverse Transfer Capacitance Crss VGS = 0V, VDS = -10V, f = 1MHz Gate-Source Charge2 UNITSPARAMETER SYMBOL TEST CONDITIONS gfs pF Ciss Coss VGS(th) VDS = -5V, ID = -0.45A DYNAMIC VGS = -2.5V, ID = -0.1A V IGSS mA Drain-Source Breakdown Voltage VGS = -4.5V, ID = -0.45A mΩ VDS = -10V, VGS = 0V , TJ = 55 ° C VDS = VGS, ID = -250mAGate Threshold Voltage Forward Transconductance1 VGS = 0V, ID = -250mAV(BR)DSS Zero Gate Voltage Drain Current Gate-Body Leakage VDS = 0V, VGS = ± 10V VDS = -16V, VGS = 0V Drain-Source On-State Resistance1 RDS(ON) IDSS REV 1.0 2 2017/12/5
Dual P-Channel Logic Level Enhancement Mode MOSFET REV 1.0 3 2017/12/5
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Dual P-Channel Logic Level Enhancement Mode MOSFET A. Marking Information ( 此产品代码为：44) B. Tape&Reel Information:3000pcs/Reel REV 1.0 6 2017/12/5
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Dual P-Channel Logic Level Enhancement Mode MOSFET D.Label rule 标签内容(Label content) REV 1.0 8 2017/12/5