P5103EMG UNIKC | Alldatasheet

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P-Channel Logic Level Enhancement Mode MOSFET PRODUCT SUMMARY V(BR)DSS SOT-23 ABSOLUTE MAXIMUM RATINGS (TA = 25 ° C Unless Otherwise Noted) THERMAL RESISTANCE RATINGS UNITS 1Pulse width limited by maximum junction temperature. 2The value of RqJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25° C. Junction-to-Ambient2 Junction-to-Lead Steady State Steady State RqJA 117 ° C / W PD TJ, TSTG RqJC Operating Junction & Storage Temperature Range SYMBOL °C-55 to 150 MAXIMUMTHERMAL RESISTANCE ID -30V TA = 25 ° C TA = 70 ° C Power Dissipation Continuous Drain Current TA = 25 ° C SYMBOL VDS Pulsed Drain Current1 RDS(ON) TA = 70 ° C PARAMETERS/TEST CONDITIONS Drain-Source Voltage Gate-Source Voltage 51mΩ @VGS = -10V -3.8A VGS -3.8 LIMITS ID IDM TYPICAL 0.7 1 W UNITS -20 ± 20 V A -30 Rev 1.1 1 2015/7/8

P-Channel Logic Level Enhancement Mode MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25 ° C, Unless Otherwise Noted) MIN TYP MAX -30 -1 -1.6 -3 ± 100 nA -10 61 85 39 51 8.8 S 456 10.3 1.4 2.5 -0.9 A -1.1 V 12 nS 4.3 nC 1Pulse test : Pulse Width  300 msec, Duty Cycle  2％. 2Independent of operating temperature. 3Pulse width limited by maximum junction temperature. Reverse Recovery Time trr IF = -3.8A, dlF/dt = 100A /mS pF SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICE ( TJ = 25 °C ) Fall Time2 Qg Qgs Qgd td(on) tr Total Gate Charge2 VDS = -15V, VGS = -10V, ID = -3.8A Gate-Drain Charge2 IF = -3.8A, VGS = 0V Continuous Current Forward Voltage1 IS VSD mΩ td(off) VDS = -15V ID @ -3.8A, VGEN = -10V, RGS = 6Ω nC nS RDS(ON) tf VDS = -10V, ID = -3.8A Turn-On Delay Time2 Rise Time2 Turn-Off Delay Time2 Gate-Source Charge2 VGS = -10V, ID = -3.8A STATIC LIMITS UNITS Drain-Source On-State Resistance1 PARAMETER SYMBOL TEST CONDITIONS Crss VGS(th) VGS = 0V, ID = -250mAV(BR)DSS Gate Threshold Voltage Drain-Source Breakdown Voltage Forward Transconductance1 gfs Input Capacitance Output Capacitance Gate-Body Leakage VDS = -24V, VGS = 0V Reverse Recovery Change Qrr VGS = 0V, VDS = -15V, f = 1MHz VGS = -4.5V, ID = -3.5A Zero Gate Voltage Drain Current Reverse Transfer Capacitance V IGSS IDSS mAVDS = -20V, VGS = 0V , TJ = 125 ° C VDS = VGS, ID = -250mA Ciss Coss DYNAMIC VDS = 0V, VGS = ± 20V Rev 1.1 2 2015/7/8

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P-Channel Logic Level Enhancement Mode MOSFET A. Marking Information ( 此产品代码为：25 ) B. Tape&Reel Information:3000pcs/Reel 160 ψ 180 1∮ ψ FEED DIRECTION ∮2.0 0.05 ∮ 9.0 0.3 ∮11.4 1 60 1 ψ 1.0 0.25 ∮4.00 0.1 3.50 0.05∮ ∮1.55 0.05

13.5 MAX

1.4max

8 MAX

∮ 8.00 0.3 Rev 1.1 6 2015/7/8

P-Channel Logic Level Enhancement Mode MOSFET Rev 1.1 7 2015/7/8

P-Channel Logic Level Enhancement Mode MOSFET D.Label rule 标签内容(Label content) Rev 1.1 8 2015/7/8