P4004ED

P4004ED UNIKC | Alldatasheet

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P-Channel Logic Level Enhancement Mode MOSFET PRODUCT SUMMARY V(BR)DSS TO-252 ABSOLUTE MAXIMUM RATINGS (TA = 25 ° C Unless Otherwise Noted) THERMAL RESISTANCE RATINGS UNITS 1Pulse width limited by maximum junction temperature. 2VDD = -20V . Starting TJ = 25° C. Avalanche Current IAS -27 A Avalanche Energy 2 L = 0.1mH EAS 36 mJ 4.1 TC= 70° C Junction & Storage Temperature Range SYMBOL W20 -55 to 150 Junction-to-Case RqJC 40 ° C / W 40mΩ @VGS = -10V -21A Drain-Source Voltage Pulsed Drain Current1 Gate-Source Voltage THERMAL RESISTANCE TYPICAL PD ID TC= 25 ° C -40V Continuous Drain Current TC= 70 ° C PARAMETERS/TEST CONDITIONS RDS(ON) Power Dissipation Tj, Tstg TC= 25 ° C RqJA UNITS -70 -17 -40 ± 20 IDM SYMBOL -21 LIMITS VVGS VDS ID V Junction-to-Ambient MAXIMUM REV 1.0 1 2014/5/13

P-Channel Logic Level Enhancement Mode MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25 ° C, Unless Otherwise Noted) MIN TYP MAX -40 -2.0 -2.5 -3 ± 250 nA -70 A 65 73 35 50 30 40 20 S 1090 175 8.5 5.5 4.95 Ω -21 A -1 V 15.5 nS 7.9 nC 1Pulse test : Pulse Width  300 msec, Duty Cycle  2％. 2Independent of operating temperature. Gate Resistance Rg VGS = 0V, VDS = 0V, f = 1MHz VDS = -10V, ID = -10A TEST CONDITIONS UNITS Gate-Body Leakage VGS(th) VGS = -7V, ID = -8A Forward Transconductance1 VDS =-30V, VGS = 0V, TJ = 125° C VGS =-5V, ID =-8A gfs VGS = 0V, VDS = -20V, f = 1MHz SYMBOL Output Capacitance DYNAMIC VDS =-32V, VGS = 0V Qgs pF Gate-Source Charge2 Reverse Transfer Capacitance Qg(VGS = -10V) Input Capacitance Total Gate Charge2 Qg(VGS =-4.5V) Qgd VDS =0.5V(BR)DSS, ID = -18A tr Turn-On Delay Time2 Rise Time2 QrrReverse Recovery Charge Continuous Current Forward Voltage1 Reverse Recovery Time tf VSD IS trr Fall Time2 Turn-Off Delay Time2 Gate-Drain Charge2 VDS =-20V ,RL = 2Ω,ID @ -10A, VGS=-10V,RGS=6Ω td(on) td(off) nS VDS = VGS, ID = -250mA VGS = 0V, ID = -250mA nC IF = -10A, dlF/dt = 100A / μS VDS = 0V, VGS = ± 20V IDSS Coss Crss LIMITS SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TJ = 25 ° C) mA mΩ IF = -1A, VGS = 0V Drain-Source On-State Resistance1 RDS(ON) VGS =-10V, ID =-10A Ciss PARAMETER Zero Gate Voltage Drain Current IGSS On-State Drain Current1 ID(ON) VDS = -5V, VGS = -10V STATIC Drain-Source Breakdown Voltage V V(BR)DSS Gate Threshold Voltage REV 1.0 2 2014/5/13

P-Channel Logic Level Enhancement Mode MOSFET REV 1.0 3 2014/5/13

P-Channel Logic Level Enhancement Mode MOSFET REV 1.0 4 2014/5/13

P-Channel Logic Level Enhancement Mode MOSFET *因为各家封装模具不同而外观略有所差异，不影响电性及Layout。 REV 1.0 5 2014/5/13