P3055LDG UNIKC | Alldatasheet

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N-Channel Logic Level Enhancement Mode MOSFET PRODUCT SUMMARY V(BR)DSS TO-252 ABSOLUTE MAXIMUM RATINGS (TC = 25 ° C Unless Otherwise Noted) THERMAL RESISTANCE RATINGS UNITS 1Pulse width limited by maximum junction temperature. ° C / W Lead Temperature (1/16” from case for 10 sec.) TL 275 °C Junction-to-Ambient Case-to-Heatsink 1RqCS Avalanche Energy L=0.1mH Junction-to-Case mJEAS 75RqJA ID TC= 25 ° C 25V Continuous Drain Current TC= 100 ° C PARAMETERS/TEST CONDITIONS RDS(ON) Operating Junction & Storage Temperature Range RqJC SYMBOL 90mΩ @VGS = 10V 12A Gate-Source Voltage TC= 25 ° C Pulsed Drain Current1 20 W SYMBOL LIMITS VGS IDM V Power Dissipation MAXIMUMTYPICAL ID PD Tj, Tstg THERMAL RESISTANCE TC= 100° C -55 to 150 UNITS ± 20 A REV 1.0 1 2014/5/19

N-Channel Logic Level Enhancement Mode MOSFET ELECTRICAL CHARACTERISTICS (TC = 25 ° C, Unless Otherwise Noted) MIN TYP MAX 0.8 1.2 2.5 ± 250 nA 250 12 A 70 120 50 90 16 S 450 200 2.0 7.0 6.0 6.0 5.0 12 A 1.5 V 30 nS 0.043 mC 1Pulse test : Pulse Width  300 msec, Duty Cycle  2％. 2Independent of operating temperature. IS VSD Qrr Qgs Qgd td(on) tr td(off) tf trr Ciss Coss Crss IF = IS, VGS = 0V VDS = 15V ,RL = 1Ω ID≌12A, VGS = 10V,RGS =2.5Ω SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 ° C) nS VDS =15V, ID =12Agfs IGSS IDSS PARAMETER V(BR)DSSDrain-Source Breakdown Voltage Gate Threshold Voltage UNITSTEST CONDITIONS Turn-On Delay Time2 Rise Time2 Fall Time2 Zero Gate Voltage Drain Current VGS = 0V, ID = 250mA Gate-Body Leakage Input Capacitance Gate-Drain Charge2 V pF mA Turn-Off Delay Time2 VDS = VGS, ID = 250mA VGS = 0V, VDS = 15V, f = 1MHz VDS = 0.5V(BR)DSS, VGS = 10V, ID = 6A DYNAMIC RDS(ON) mΩ VGS =10V, ID =12A nC Total Gate Charge2 SYMBOL Reverse Recovery Charge Continuous Current Forward Voltage1 Reverse Recovery Time Gate-Source Charge2 Output Capacitance Qg Reverse Transfer Capacitance LIMITS VDS =20V, VGS = 0V STATIC Forward Transconductance1 VDS =20V, VGS = 0V, TJ = 125° C VGS =5V, ID =12A VDS = 0V, VGS = ± 20V VGS(th) Drain-Source On-State Resistance1 On-State Drain Current1 ID(ON) VDS = 10V, VGS = 10V REV 1.0 2 2014/5/19

N-Channel Logic Level Enhancement Mode MOSFET REV 1.0 3 2014/5/19

N-Channel Logic Level Enhancement Mode MOSFET *因为各家封装模具不同而外观略有所差异，不影响电性及Layout。 REV 1.0 4 2014/5/19