HV881

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Technical content

Features

► Sixteen channel EL lamp driver with single common terminal ► 1nF maximum load on each of the sixteen channels ► Independent dimming capability for all lamps ► Sixteen brightness levels for each lamp ► 1.8 to 5.5V operating supply range ► 1.7V logic interface ► Dedicated enable logic pin ► 340VP-P nominal output voltage for high brightness ► Low audible noise ► Output voltage regulation ► EL1 - EL16 outputs fall time control ► Two EL frequency controls ► External switching MOSFET ► I2C data communication control ► Single lithium-ion cell compatible ► One miniature inductor to power sixteen lamps ► Independent lamp and converter frequency setting ► Split supply capability ► 5x5mm, 32-Lead QFN package

Applications

► Multi-segment, variable displays ► Cell phone keypads and displays ► Multi-segment remote controls ► Handheld wireless communication products ► Global Positioning Systems (GPS) The HV881 has two internal oscillators and a high voltage EL lamp driver. An external MOSFET is driven by the switch oscillator to generate output voltage. The frequency for the external switching MOSFET is set by an external resistor connected between the RSW-Osc pin and the VDD supply pin. The EL lamp driver frequency can be set by either an external logic signal frequency at the SEL pin or by an external resistor connected between the REL-Osc pin and VDD pin. If external frequency is input at the SEL pin, the REL-Osc pin should be connected to ground. An external inductor is connected between the LX and VDD or VIN pins for split supply applications. Depending upon the EL lamp sizes, a 1.0 to 10.0nF capacitor is connected between the CS pin and ground. The C S capacitor is connected to the internal H-bridge, and the energy stored in the capacitor is therefore transferred to the EL lamp. One side of all the sixteen EL lamps is connected to the respective EL pins (EL1, EL2, etc.), and the other side is connected to the COM pin. The external switching MOSFET charges the inductor and discharges it into the capacitor at CS. The voltage at CS will start to increase. Once the voltage at CS reaches the desired regulation limit, the external switching MOSFET is turned off to conserve power. The HV881 allows for controlling the fall time of the EL1 - EL16 outputs by an external resistor from the RSLOPE pin to the VDD pin. This feature can be used to reduce the audible noise of the EL lamp or to increase the lamp brightness. The brightness of each of the sixteen EL lamps can be independently controlled to have one of fifteen brightness levels or can be completely turned off by the serial data (SDA) input. The serial data input has a 4-bit binary code for each lamp, to control the brightness level from level 0 to level 15. The brightness is controlled by controlling the number of EL frequency cycles (from 0 to 15) in a group of 15 cycles. Dimmable, Low Noise, 16 channel EL Lamp Driver General Description The Supertex HV881 is a 16 channel EL lamp driver with a single common terminal. It can drive up to a 1nF EL lamp load (approx. 0.3in2 lamp size) on each of the sixteen channels. The input supply voltage range is 1.8 to 5.5V. The logic interface to the device can be as low as 1.7V. The device has an enable logic input pin to turn the device on or off. The device is designed to minimize audible noise emitted by the EL lamp. The HV881 uses an external MOSFET, a single inductor and minimum number of passive components to drive all sixteen EL lamps. The device is designed such that the input voltage to the inductor can be different from the input voltage to the device (split supply).

Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com

Ordering Information

5.00x5.00mm body 0.8mm height (max) 0.50mm pitch HV881 HV881K7-G -G indicates package is RoHS compliant (‘Green’) Absolute Maximum Ratings Parameter Value VDD, supply voltage -0.5 to 7.0V EN, SDA, SCL, SEL -0.5 to VDD +0.5V VCS, output voltage -0.5 to 215V VREG, external input voltage 0.48V Storage temperature -65°C to +150°C Maximum junction temperature +125°C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Pin Configuration Package θja 32-Lead QFN 25°C/W (Mounted on 4-layer FR4 9-via PCB, 76mm x 114mm x 1.44mm) Thermal Resistance Note: Pads are at the bottom of the package. Center heat slug is at ground potential. Product Marking 32-Lead QFN Package 32-Lead QFN Package (top view) Recommended Operating Conditions Sym Parameter Min Typ Max Units Conditions VDD Supply voltage 1.8 - 5.5 V --- fSW Switching frequency 50 - 200 kHz --- fEL EL output frequency 200 - 1000 Hz --- SEL Input for EL output frequency 1600 - 8000 Hz SEL = 8 x (fEL) and 50% duty cycle CLOAD Lamp capacitance per EL output 0 - 1.0 nF --- CCOM COM lamp capacitance 0 - 16 nF --- Tj Operating temperature -40 - +85 °C --- Package may or may not include the following marks: Si or HV881 LLLLLL YYWW AAACCC L = Lot Number YY = Year Sealed WW = Week Sealed A = Assembler ID C = Country of Origin = “Green” Packaging

Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com

Electrical Characteristics

(Over recommended operating conditions unless otherwise specified TJ = 25°C) Sym Parameter Min Typ Max Unit Conditions VCS Output regulation voltage 145 170 195 V VDD = 1.8 to 5.5V VLAMP Differential output voltage 290 340 390 V VDD = 1.8 to 5.5V IDDQ Quiescent VDD supply current - - 1000 nA VDD = 5.5V IDD Input current going into the VDD pin - - 350 µA VDD = 5.5V, REL = 2.0MΩ RSW =1.0MΩ, RSL = 800kΩ IIN Input current including inductor current - - 110 mA See Typical Application Circuit, VIN = 4.2V VREG External input voltage range 0 - 0.44 V VDD = 1.8 to 5.5V fEL EL Lamp frequency - 200 - Hz REL =2.0MΩ fSW Switching transistor frequency - 90 - kHz RSW =1.0MΩ D External MOSFET duty cycle - - 88 % --- VIH SEL, EN, SDA, SCL logic pins input high level 1.7 - V DD V VDD = 1.8 to 5.5V VIL SEL, EN, SDA, SCL logic pins input low level 0 - 0.2 V V DD = 1.8 to 5.5V ILogic EN, SDA, SCL pins input current -1.0 - 1.0 µA VDD = 1.8 to 5.5V ILogic-SEL SEL logic pin input current -1.0 - 12.0 µA VDD = 1.8 to 5.5V VGATE External MOSFET gate voltage - 8.0 - V VDD = 1.8 to 5.5V tGATE-RISE External MOSFET gate voltage rise time - 100 - ns V DD = 1.8 to 5.5V, CL = 330pF tGATE-FALL External MOSFET gate voltage fall time - - 20 ns V DD = 1.8 to 5.5V, CL = 330pF tf EL1 - EL16 outputs fall time for ½ EL cycle - 190 - µs R SL = 800kΩ, VDD = 3.0V, VCS =170V fCLK SCL speed - - 500 kHz --- tSU Setup time before clock falls 300 - - ns --- tH Hold time after clock falls 850 - - ns ---

Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com Typical Application Circuit VDD REL-Osc RSW -Osc RSLOPE EN SEL SCL SDA 2.0MΩ 1.0MΩ 800kΩ 0.1µF 3.3nF , 200V 4.7µF 100kΩ0.1µF VREG VOUT VDRIVE G AT E CS BAS20 GND HVGND EL 1 EL 2 EL 3 EL 4 EL 5 EL 16 COM 0.3in 2 EL Lamp 1 0.3in 2 EL Lamp 2 0.3in 2 EL Lamp 3 0.3in 2 EL Lamp 4 0.3in 2 EL Lamp 5 0.3in 2 EL Lamp 16 V IN ON = 1.7V to V DD OFF = 0.7 to 0.2V ON = 1.7V to V DD OFF = 0 to 0.2V I 2 C Control: ON = 1.7V to V DD OFF = 0 to 0.2V 68µH (Cooper SD53-680-R) V DD HV881 Vi shay SiA456DJ Note: The LX MOSFET may be changed depending on output load and required output power. VDD (V) Lamp Size VIN (V) IIN (mA) VCS (V) fEL (Hz) Lamp Brightness (cd/m2) 3.0 0.3in2 lamp on each of the EL1 - EL16 outputs 3.2 72.1 160 190 33 3.7 62.3 160 190 35 4.2 52.3 160 190 36 Test Data

Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com Typical Output Waveform VCS EL1 COM EL Lamp Brightness Control using I2C No of bits bit bits bit bit bits bit bits bit bits bit bits bit bits bit bits bit bits bit bits bit bit - start bit slave addr W bit Ack byte

0 Ack byte

1 Ack byte

2 Ack byte

3 Ack byte

4 Ack byte

5 Ack byte

6 Ack byte

7 Ack stop

The I2C format for the SDA input is shown below: Note: The I2C is write-only. So the W bit has to always be logic low. (A “0” indicates a transmission write). 7-bit slave address: 000 0110 (0x06 in hex) Each of the EL lamp’s brightness controls is a 4-bit binary number which is provided by the serial data input (SDA). Byte 0 controls both the 16 level brightness of EL_lamp1 (bit0 - bit3) and EL_lamp2 (bit4 - bit7) and similarly, other bytes control the brightness of other pairs of lamp. 1. If all the 4 bits for a designated EL lamp are L, the differential voltage across the lamp is zero. 2. If any of the 4 bits for a designated EL lamp is H: a. The 4-bit value sets the average number of cycles for which the EL lamp voltage is non-zero. b. The EL lamp brightness is linearly proportional to the binary lamp control code.

Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com Block Diagram 1.26V VREF PWM Switch Oscillator 0 to 88% C VIN D 8V Linear RegulatorDevice Enable VSENSE CIN LX CS CG VDRIVEVDD GATE CS EL1 EL16 COM HVGND GND RSLOPE SCL SDA SEL REL-Osc VOUT VREG RSW-Osc EN CDD VDD 60pF 2 x EL Freq. EL Frequency REL RREG RSL RSW Output Discharge Slew Rate Control I2C Control for

16 Level

1.0MΩ

Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com Pin Configuration and External Component Description Pin # Pin Name Description

1 REL-Osc

The external resistor from REL-Osc to VDD sets the EL frequency. The EL frequency is inversely proportional to the external REL resistor value. Reducing the resistor value by a factor of two will result in increasing the EL frequency by two.

2 RSLOPE

The external resistor, RSL, from RSLOPE to VDD, controls the EL1 - EL16 outputs discharge time. The equation for the EL1 - EL16 outputs typical fall time is: tf(typ) = VCS / ((VDD - 0.85) / (RSL • 3pF))µs.

3 RSW-Osc

The external resistor from RSW-Osc to VDD sets the switch converter frequency. The switch con- verter frequency is inversely proportional to the R SW resistor value. Reducing the resistor value by a factor of two will result in increasing the switch converter frequency by two.

4 VREG

The input voltage to set the VCS regulation voltage. This pin allows an external voltage source to control the VCS amplitude in the range from 0 to 195V. The output voltage is (403 ± 10%) • VREG. The VREG voltage can also be set by using an external resistor between VREG and VOUT pins. The output charging rate is inversely proportional to the resistor value.

5 VOUT

Switched and voltage divided to one-third the internal reference voltage. An external resistor be- tween VREG and VOUT pins controls the V CS charging rate. If this pin is not used, then it should be left floating. 6 VDD The low voltage input supply pin. 7 GND Device ground. 8 EN 1.7V logic input pin to turn the device ON/OFF. A logic high turns ON the device and a logic LOW turns the device OFF. 9 – 16 EL16 - EL9 EL lamp 16, EL lamp 15 …. EL lamp 9 connections. 17 COM The common connection for all the 16 EL lamps. 18 – 25 EL8 - EL1 EL lamp 8, EL lamp 7 …. EL lamp 1 connections. 26 HVGND High voltage ground. It should be connected to device ground. 27 CS Connect a 0.001µF to 0.01µF 200V capacitor between this pin and ground. This capacitor stores the energy transferred from the inductor.

28 SCL The I

2C logic serial clock input pin. 29 SDA The I2C logic serial data input pin.

30 GATE

The gate control pin for the switching MOSFET. The connection for an external MOSFET. In general, low RON MOSFET’s, which can handle more current, are more suitable to drive larger size lamps. Also a small value inductor should be used. But as the R ON value and the inductor value decrease, the switching frequency of the inductor (controlled by RSW) should be increased to avoid inductor saturation. The external MOSFET threshold voltage minimum value should be equal to V DD or lower. 31 VDRIVE Drive voltage for the MOSFET gate voltage. An external bypass capacitor (C G) is required to ground.

32 SEL

The external logic signal input pin to set the EL frequency. If this pin is used, the REL-Osc pin should be connected to ground. The frequency input at this pin should be at 50% duty cycle and at eight times the desired EL output frequency. If this pin is not used then it should be left floating. This pin has an internal pull- down resistor of 1.0MΩ ± 50%. Center Pad Center heat slug, externally connected to Ground.

Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such appl ications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) ©2011 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Supertex inc.

1235 Bordeaux Drive, Sunnyvale, CA 94089

Tel: 408-222-8888 www.supertex.com HV881 (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Doc.# DSFP-HV881 A060811 32-Lead QFN Package Outline (K7) 5.00x5.00mm body, 0.80mm height (max), 0.50mm pitch Symbol A A1 A3 b D D2 E E2 e L L1 θ Dimension (mm) MIN 0.70 0.00 0.20 REF 0.50 BSC 0.30† 0.00 0O JEDEC Registration MO-220, Variation WHHD-6, Issue K, June 2006. * This dimension is not specified in the JEDEC drawing. † This dimension differs from the JEDEC drawing. Drawings not to scale. Supertex Doc. #: DSPD-32QFNK75X5P050, Version A052311. Notes: 1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. 2. Depending on the method of manufacturing, a maximum of 0.15mm pullback (L1) may be present. 3. The inner tip of the lead may be either rounded or square. Seating Plane Top View Side View Bottom View A D E e b L View B View B Note 3 Note 2 Note 1 (Index Area D/2 x E/2) Note 1 (Index Area D/2 x E/2) 32 32 θ