HV861

HV861 SUTEX | Alldatasheet

Document overview

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Technical content

Features

Adjustable output regulation for dimming Lamp fade-in/fade-out capability Low audible noise 180V PP output voltage for higher brightness 1.5V enable input logic high Single cell lithium ion compatible One miniature inductor to power both lamps Separately adjustable lamp and converter frequencies Split supply capability 16-Lead QFN package

Applications

Dual display cellular phones Keypad and LCD backlighting PDAs Handheld wireless communication products Global Positioning Systems (GPS) The device uses a single inductor and a minimum number of passive components. Using the internal reference voltage, the regulated output voltage is at a nominal value of 90V. The EL Lamps will therefore see ±90V. The two EL Lamps can be turned ON and OFF using two CMOS logic inputs, EN1 and EN2. The driver is disabled when both EN1 and EN2 are at logic low. The HV861 has two internal oscillators, a switching MOSFET, and two high voltage EL Lamp driver H-bridges. Each driver has its own half bridge common output, COM1 and COM2, which signifi cantly minimizes the DC offset seen by the EL Lamp. The frequency for the switching MOSFET is set by an external resistor connected between the RSW-osc pin and the supply pin VDD. The EL Lamp driver frequency is set by an external resistor connected between the REL-osc pin and the VDD pin. An external inductor is connected between the LX and VDD pins or VIN for split supply applications. Depending upon the EL Lamp sizes, a 1.0nF to 10.0nF capacitor is connected between the CS and ground. As the switching MOSFET charges the external inductor and discharges it into the capacitor at CS, the voltage at CS will start to increase. Once the voltage at CS reaches a nominal value of 90V, the switching MOSFET is turned OFF to conserve power. EL Lamp dimming can be accomplished by applying a PWM logic signal to the PWM pin. The EL Lamp brightness will be proportional to the PWM duty cycle. The HV861 can also slowly turn the EL Lamp ON/OFF giving a fade ON/OFF appearance. Typical Application Circuit Dimmable, Low Noise, Dual EL Lamp Driver General Description The Supertex HV861 is a low noise, dimmable, high voltage, dual EL Lamp driver designed for driving two electroluminescent (EL) Lamps with a combined area of 5.0 square inches. The input supply voltage range is from 2.5V to 4.5V. Enable input logic high can go as low as 1.5V, which allows logic interface operating from typical 1.8V supplies. The device is designed to minimize audible noise emitted by the EL Lamps. 100µH Coilcraft LPS4012 3.3MΩ 2.0MΩ 825kΩ VDD = 3.0V 0.1µF 2.2µF Input Logic Control: ON = 1.5V to VDD OFF = 0V to 0.2V GND EN1 VDD 1415 16 13 PWMVREF EN2 RSW-osc REL-osc VREG VOUT LX CS EL1 COM1 EL2 COM2 HV861K7-G EL1 EL2 3.3nF 100V NPO 1N41484.7µF VIN = 3.2V to 4.2V

Ordering Information

3x3mm body, 0.80mm height (max), 0.50mm pitch HV861 HV861K7-G -G indicates package is RoHS compliant (‘Green’) Absolute Maximum Ratings Parameter Value VDD, supply voltage -0.5V to 5.5V Operating temperature -40°C to +85°C Storage temperature -65°C to +150°C Power dissipation 1.6W V CS, output voltage -0.5V to +120V Sym Parameter Min Typ Max Units Conditions Electrical Characteristics (Over recommended operating conditions unless otherwise specifi ed) Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Pin Confi guration Package θja 16-Lead QFN 60 °C/W Thermal Resistance RDS(ON) On-resistance of switching transistor - - 7.0 Ω I = 100mA VCS Maximum output regulation voltage 80 90 100 V V DD = 2.5V to 4.5V VCS Output regulation voltage -7 8- V VDD = 2.5V to 4.5V, VREG = 1.092V -6 2- V DD = 2.5V to 4.5V, VREG = 0.862V -4 5- V DD = 2.5V to 4.5V, VREG = 0.632V VREG External input voltage range 0 - 1.40 V V DD = 2.5V to 4.5V Note: Pads are at the bottom of the package. Center heat slug is at ground potential. 1 12 5 6 7 8 13141516 VREF VREG VOUT PWM EL1 COM1 COM2 EL2 REL-osc RSW-osc VDD EN1 EN2 GND LX CS Y = Last Digit of Year Molded W = Code for Week Molded L = Lot Number = “Green” Packaging H861 YWLL Product Marking 16-Lead QFN Package 16-Lead QFN Package Recommended Operating Conditions Sym Parameter Min Typ Max Units Conditions VDD Supply voltage 2.5 - 4.5 V --- fSW Switching frequency 40 - 200 kHz --- fEL EL output frequency 100 - 500 Hz --- CLOAD Total EL Lamp capacitance load 0 - 20 nF --- TA Operating temperature -40 - +85 °C ---

Sym Parameter Min Typ Max Units Conditions Electrical Characteristics (cont.) IREF(SOURCE) Average sourcing current from VREF pin - 6.0 - µA V DD = 2.5V to 4.5V IREF(SINK) Average sinking current from VREF pin - 6.0 - µA V DD = 2.5V to 4.5V IDDQ Quiescent VDD supply current -- 3 0 0 nA VDD = 2.5V, EN1 = EN2 = PWM = low -- 4 0 0 VDD = 3.0V, EN1 = EN2 = PWM = low EN1 = EN2 = PWM = low IDD Input current going into the VDD pin - - 250 µA VDD = 2.5V to 4.5V, REL = 2.0MΩ, RSW = 825kΩ IIN Input current including inductor current - 25 50 mA V IN = 3.2V (see Test Circuit) fEL EL Lamp frequency 160 190 220 Hz R EL = 2.0MΩ fSW Switching transistor frequency 84 100 116 kHz R SW = 825kΩ PWM Input PWM frequency 10 - 100 kHz --- D Switching transistor duty cycle - 88 - % --- VIH Enable PWM input logic high voltage 1.5 - V DD VV DD = 2.5V to 4.5V VIL Enable PWM input logic low voltage 0 - 0.2 V V DD = 2.5V to 4.5V IIH Enable PWM input logic high current - - 1.0 µA V IH = VDD = 2.5V to 4.5V IIL Enable PWM input logic low current - - -1.0 µA V IL = 0V, VDD = 2.5V to 4.5V CIN Enable PWM input capacitance - - 15 pF --- Function Table EN1 EN2 EL1 EL2 COM1 COM2 IC 0 0 Hi Z Hi Z Hi Z Hi Z OFF 0 1 H i ZO NH i ZO N O N 1 0 ON Hi Z ON Hi Z ON 1 1 ON ON ON ON ON Typical Performance VDD (V) VIN (V) Lamp IIN (mA) VCS (VPEAK) FEL (Hz) Lamp Brightness (cd/m2) EL1 EL2 3.0 4.0 EL1 ON 16.9 93 188 14.8 - EL2 ON 11.4 - 18.0 EL1 and EL2 ON 25.0 14.6 17.7

Pin Confi guration and External Component Description Pin # Name Description

1 REL-Osc

External resistor from REL-Osc to VDD sets the EL frequency. The EL frequency is inversely pro- portional to the external REL resistor value. Reducing the resistor value by a factor of two will result in increasing the EL frequency by two. fEL = (2.0MΩ • 190Hz) / REL

2 RSW-Osc

External resistor from RSW-Osc to VDD sets the switch converter frequency. The switch converter frequency is inversely proportional to the external RSW resistor value. Reducing the resistor value by a factor of two will result in increasing the switch converter frequency by two. fSW = (825kΩ • 100kHz) / RSW 3 VDD Low voltage input supply pin. 4 EN1 Enable input signal for EL Lamp 1. CMOS logic input pin. Refer to the function table. 5 EN2 Enable input signal for EL Lamp 2. CMOS logic input pin. Refer to the function table. 6 GND Device ground. 7L X Drain of internal switching MOSFET. Connection for an external inductor. The inductor LX is used to boost the low input voltage by inductive fl yback. When the internal switch is on, the inductor is being charged. When the internal switch is off, the charge stored in the inductor will be transferred to the high voltage capacitor C S. The energy stored in the capaci- tor is connected to the internal H-bridge, and therefore to the EL Lamp. In general, smaller value inductors, which can handle more current, are more suitable to drive larger size Lamps. As the inductor value decreases, the switching frequency of the inductor (controlled by R SW) should be increased to avoid saturation. 8C S Connect a 100V capacitor between this pin and ground. This capacitor stores the energy trans- ferred from the inductor. 9 EL2 EL Lamp 2 connection. 10 COM2 Common connection for EL2 Lamp. 11 COM1 Common connection for EL1 Lamp. 12 EL1 EL Lamp 1 connection. 13 PWM PWM pulse input for EL Lamp dimming. The duty cycle of the PWM signal is proportional to the output voltage. If PWM dimming is not desired, then the PWM pin should be tied to ground. 14 VOUT Switched internal reference voltage.

15 VREG

Input voltage to set V CS regulation voltage. This pin allows an external voltage source to control the VCS amplitude. EL Lamp dimming can be accomplished by varying the input voltage to VREG. The VCS voltage is approximately 71 times the voltage seen on VREG. External resistor connected between VREG and VOUT pins controls the V CS charging rate. The charging rate is inversely proportional to the resistor value.

16 VREF

Internal reference voltage to set the regulation voltage. Connect an external capacitor (CREF) from VREF to ground to slowly brighten the lamp during power-up and dim down the lamp during power-down. The size of the capacitor determines the time taken to brighten up or dim down. If fade-in and fade-out are not required, this pin should be left fl oating. Fade in/fade out time = C REF x 210 x 103.

(The package drawing(s) in this data sheet may not refl ect the most current specifi cations. For the latest package outline information go to http://www.supertex.com/packaging.html.) Seating Plane Top View Side View Bottom View A D E e b L View B View B Note 3 Note 2 Note 1 (Index Area D/2 x E/2) Note 1 (Index Area D/2 x E/2) θ 16-Lead QFN Package Outline (K7) (3x3mm body, 0.80mm height (max), 0.50mm pitch) Symbol A A1 A3 b D D2 E E2 e L L1 θ Dimension (mm) MIN 0.70 0.00 0.20 REF 0.50 BSC 0.20* 0.00 0 O JEDEC Registration MO-220, Variation WEED-4, Issue K, June 2006. Dimensions marked with (*) are non-JEDEC dimensions. Drawings are not to scale. Notes: Details of Pin 1 identifi er are optional, but must be located within the indicated area. The Pin 1 identifi er may be either a mold, or an embedded metal or marked feature. Depending on the method of manufacturing, a maximum of 0.15mm pullback (L1) may be present. The inner tip of the lead may be either rounded or square. Doc.# DSFP-HV861 A020708