HV841

HV841 SUTEX | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 7

Technical content

Features

/boxshadowdwn Independent input control for lamp selection /boxshadowdwn Split supply capability /boxshadowdwn Patented output timing /boxshadowdwn One miniature inductor to power both lamps /boxshadowdwn Low shutdown current /boxshadowdwn Wide input voltage range 2.0V to 5.8V /boxshadowdwn Output voltage regulation /boxshadowdwn No SCR output /boxshadowdwn Available in small packages (10-lead MSOP and 10-lead DFN/MLP)

Applications

/boxshadowdwn Mobile cellular phones, dual display /boxshadowdwn Keypad and LCD backlighting /boxshadowdwn Portable instrumentation /boxshadowdwn Dual segment lamps /boxshadowdwn Hand held wireless communication devices General Description The Supertex HV841 is a high voltage driver designed for driving two EL lamps with a combined area of 3.5 square inches. The input supply voltage range is from 2.0V to 5.8V. The device is designed to reduce the amount of audible noise emitted by the lamp. This device uses a single inductor and minimum number of passive components to drive two EL lamps. The nominal regulated output voltage of ±100V is applied to the EL lamps. The chip can be enabled/ disabled by connecting C 1 and C2 (pins 1 and 4) to VEN/ Ground. The HV841 has an internal oscillator, a switching MOSFET, and two high voltage EL lamp drivers. An external resistor connected between the R SW-OSC and the voltage supply pin VDD sets the frequency for the switching MOSFET. The EL lamp driver frequency is set by dividing the MOSFET switching frequency by 128. An external inductor is connected between the L X and the V DD pins. Depending on the EL lamp size, a 1.0 to 10.0nF, 200V capacitor is connected between CS and Ground. The two EL lamps are connected between EL1 to Com and EL2 to Com. The switching MOSFET charges the external inductor and discharges it into the capacitor at C S. The voltage at C S increases. Once the voltage at C S reaches a nominal value of 100V, the switching MOSFET is turned off to conserve power. The outputs EL 1 to Com and EL2 to Com are confi gured as H bridges and switch in opposite states to achieve 200V across the EL lamp. Typical Application Circuit D CS LX VEN = ON 0 = OFF VEN = ON 0 = OFF VDD CDD VIN CIN RSW-OSC HV841MG-G/ HV841K6-G EL Lamp 21 EL Lamp 11 VDD Com GND EL2 LX CS EL1C1 RSW-OSC

1 The bigger sized lamp should be tied to EL1 and the smaller

sized lamp to EL2 terminals (pins 10 and 9 respectively)

2 NR033106

Recommended Operating Conditions Symbol Parameter Min Typ Max Units Conditions VDD Supply Voltage 2.0 5.8 V TA Operating Temperature -40 85 oC

Ordering Information

Absolute Maximum Ratings* Supply Voltage, VDD -0.5 to +7.5V Supply Voltage, VCS -0.5 to +120V Operating Ambient Temperature Range -40°C to +85°C Storage Temperature Range -65° to +150°C *Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground, Gnd

1 Product supplied on 3000 piece carrier tape reels only

2 Product supplied on 2500 piece carrier tape reels only

-G indicates package is RoHS compliant (‘Green’) C1 C2 EL1 EL2 Com IC 0 0 Hi Z Hi Z Hi Z OFF

01 H i Z O N O N O N

10 O N H i Z O N O N

Pin Confi guration Pin1 HV841K6-G C2 CS LX VDD COM EL1 EL2 GND RSW-OSC HV841MG-G VDD Com GND EL2 LX CS EL11 10C1 RSW-OSC Top View: MSOP-10 Top View: DFN/MLP-10 (Pads are on the bottom of the package.) Note: Packages are not drawn to scale.

3 NR033106

Symbol Parameter Min Typ Max Units Conditions RDS(ON) On-resistance of switching transistor -- 6.0 Ω I = 100mA VDD Input Voltage Range 2.0 - 5.8 V --- VCS Output regulation voltage 90 100 110 V V DD = 2.0V to 5.8V VDIFF Differential output peak to peak voltage (EL1 to Com, EL2 to Com) 180 200 220 V V DD = 2.0V to 5.8V IDDQ Quiescent VDD supply current -- 150 nA C 1 = C2 = 0 to 0.1V -- 500 nA C 1 = C2 = 0.1 to 0.3V IDD Input current into the VDD pin - 190 µAV DD = 2.0V to 5.8V fEL VDIFF output drive frequency 215 244 273 Hz V IN = 3.0V. See Figure 1. D Switching Transistor Duty cycle 85 - 89 % --- IIL Input logic low current going into the control pin -- -0.6 µAV DD = 2.0V to 5.8V IIH Input logic low current going into the control pin -- 0.6 µAV DD = 2.0V to 5.8V VEN-L Logic input low voltage 0 - 0.3 V --- VEN-H Logic input high voltage 1.5 - VDD V --- Package θJA MSOP-10 400 oC/W DFN/MLP-10 60 oC/W Thermal Resistance (Mounted on FR4 board, 25mm x 25mm x 1.57mm)

Electrical Characteristics

DC Characteristics (Over operating conditions unless otherwise specifi ed, TA= 25°C)

4 NR033106

Figure 1: Test Circuit Vcs Vcs Disable EL1 EL2 COM RSW-OSC CS LxVDD GND Output Drivers Logic Control & Divide by 128 Control Logic & Switch-Osc + VSENSE VREF BAS211 330µH2 VEN = ON 0 = OFF VEN = ON 0 = OFF VDD VIN 470 kΩ HV841MG-G/ HV841K6-G EL Lamp 2 (1.6 in2)3 VDD Com GND EL2 LX CS EL1C1 RSW-OSC0.1µF 4.7µF 3.3 nF, 200V EL Lamp 1 (1.9 in2)3 1 or any (equivalent or better) > 120V, fast recovery diode

2 Murata LQH4CN331K04

3 The bigger sized lamp should be tied to EL1 and the smaller

sized lamp to EL2 terminals (pins 10 and 9 respectively)

5 NR033106

Pin Confi guration and Description Pin # Name Function 1C 1 Enable input signal for EL lamp 1. Logic high will turn ON the EL lamp 1 and logic low will turn it OFF. Refer to the Function Table. 2V DD Input supply voltage pin. 3R SW-OSC External resistor connection to set both the switching MOSFET frequency and EL Lamp frequency. The external resistor should be connected between this pin and the V DD pin. The EL lamp frequency is switching frequency divided by 128. The switching frequency increases as the value of R SW-OSC decreases. A 470kΩ resistor will provide a switching frequency of 31.2 kHz, and an EL lamp frequency of 244 Hz. To change the frequency to f SW1, the value of the resistor RSW-OSC1 can be determined as RSW-OSC1 = (470k x 31.2k) / fSW1. 4C 2 Enable input signal for EL lamp 2. Logic high will turn ON the EL lamp 2 and logic low will turn it OFF. Refer to the Function Table. 5 GND IC Ground Pin. 6L X External inductor connection to boost the low input voltage using inductive fl yback. Connect an inductor between V IN and this pin. Also connect a high voltage fast recovery diode between this pin and the C S pin. The anode of the diode needs to be connected to the L X pin and the cathode to the C S pin. In general, small valued inductors, which can handle more current, are more suitable for driving large sized lamps. As the inductor value decreases, the switching frequency should be increased to avoid saturation. When the switching MOSFET is turned ON, the inductor is being charged. When the MOSFET is turned OFF, the energy stored in the inductor is transferred to the high voltage capacitor connected at the CS pin. 7C S Connect a 200V capacitor between this pin and GND. This capacitor stores the energy transferred from the inductor. 8 Com Common connection for both EL lamps. Connect one end of both the lamps to this pin. 9E L 2 EL lamp 2 connection. For optimum performance, the smaller of the two lamps should be connected to this pin. 10 EL 1 EL lamp 1 connection. For optimum performance, the larger of the two lamps should be connected to this pin.

6 NR033106

The HV841 can be used in applications operating from a battery where a regulated voltage is available. This is shown in Figure 2. The regulated voltage can be used to drive the internal logic of HV841. The amount of current used to drive the internal logic is less than 190µA. Therefore, the regulated voltage could easily provide the current without being loaded down. Figure 2: Split Supply Confi guration D CS LX VEN = ON 0 = OFF VEN = ON 0 = OFF Regulated Voltage = VDD RSW-OSC HV841MG-G/ HV841K6-G EL Lamp 21 EL Lamp 11 VDD Com GND EL2 LX CS EL1C1 RSW-OSC Battery Voltage = VIN sized lamp to EL2 terminals (pins 10 and 9 respectively) This section describes a method (patented) developed at Supertex to reduce the audible noise emitted by the EL lamps used in application sensitive to audible noise. The waveform takes the shape of approximately 2RC time constants for rising and 2RC time constants for falling, where C is the capacitance of the EL lamp, and R is the external resistor, R SER connected in series with the EL lamp. Figure 3 shows a general circuit schematic that uses the series resistors, R SER1 and R SER2, for each of the EL lamps. R SER1 and RSER2 are connected in series with the EL lamp. The audible noise can be set a desirable level by selecting the resistances for R SER1 and RSER2. It is important to note that addition of these external resistors will reduce the voltage across the EL lamp, and hence the brightness of the EL lamp. Figure 3: Typical Application Circuit For Audible Noise Reduction Audible Noise Reduction D CS LX ON = VEN OFF = 0 VDD CDD VIN CIN RSW-OSC HV841MG-G/ HV841K6-G EL Lamp 21 EL Lamp 11 VDD Com GND EL2 LX CS EL1C1 RSW-OSC RSER2 RSER1 ON = VEN OFF = 0 Enable 1 Enable 2 sized lamp to EL2 terminals (pins 10 and 9 respectively) Split Supply Confi guration

Supertex inc.

1235 Bordeaux Drive, Sunnyvale, CA 94089

TEL: (408) 222-8888 / FAX: (408) 222-4895 www.supertex.com ©2006 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell its products for use in s uch applications, unless it receives an adequate "product liability indemnification insurance agreement". Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and spe cifications are subject to change without notice. For the latest product specifications, refer to the Supertex website: http//www.supertex.com. 7Doc.# DSFP-HV841 NR033106 HV841 10-Lead DFN/MLP Package Outline (K6) 10-Lead MSOP Package Outline (MG) Dimensions in Inches (Dimensions in Millimeters) Notes: 1. Measurement Legend = 2. MLP Package dimensions conform to JEDEC MO-229 0.010 (0.250) DETAIL A SEE DETAIL A 0°– 6° GATE PLANE = 0.118±0.004 (3.000±0.100) 0.193±0.004 (4.900±0.100) 0.020±0.006 (0.500±0.152) 0.007±0.002 (0.180±0.050) 0.004±0.002 (0.325±0.075) 0.037±0.005 (0.950±.015) 0.118±0.004 (3.000±0.100) 0.021±0.005 (0.550±0.150) 0.033±0.004 (0.850±0.100) ** Full Circle or Half Circle Pin #1 Index Pin #1 Index 0.118 (3.000) 0.118 (3.000) 0.063 (1.600) 0.087 (2.200) 0.020 (0.500) Bottom View Top View 0.035±0.004 (0.900±0.100) 0.008 (0.200) Side View 0.059 (1.500) 0.059 (1.500) 0.010 0.250 +0.002 -0.003 +0.050 -0.070 ) 0.012 0.300 +0.006 -0.004 +0.150 -0.100 0.001 0.020 +0.001 -0.001 +0.030 -0.020 )