HV7022PJ-C-G

DATASHEET SEARCH SITE | WWW.ALLDATASHEET.COM

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 9

Technical content

Features

► HVCMOS® technology ► Symmetric row drive (reduces latent imaging in ACTFEL displays) ► Output voltage up to +230V ► Low power level shifting ► Source/sink current minimum 70mA ► Shift register speed 4.0MHz ► Pin-programmable shift directionFunctional Block Diagram 34-Channel Symmetric Row Driver General Description The HV7022C is a low-voltage serial to high-voltage parallel converter with push-pull outputs. It is especially suited for use as a symmetric row driver in AC thin-film electroluminescent (ACTFEL) displays. The HV7022C offers 34 output lines, a direction (DIR) pin to give CW or CCW shift register loading, output enable (OE), and polarity (POL) control. After data is entered (on the falling edge of CLK), a logic high will cause the output to swing to VPP if POL is high, or to GND if POL is low. HVOUT1 OE POL DATA INPUT DATA OUT GND S/R CLK VDD VPP DIR HVOUT2 HVOUT34 Level Translator P N P N P N Level Translator Level Translator

Supertex inc. www.supertex.com Doc.# DSFP-HV7022C B041111

Ordering Information

.650x.650in body .190in height (max) .050in pitch 44-Lead PLCC .653x.653in body .180in height (max) .050in pitch HV7022-C HV7022DJ-C* HV7022PJ-C-G -G indicates package is RoHS compliant (‘Green’) * Hi-Rel process flow available. Absolute Maximum Ratings Pin Configuration 1 44 6 40 Product Marking YY = Year Sealed WW = Week Sealed L = Lot Number C = Country of Origin* A = Assembler ID* *May be part of top marking Top Marking Bottom Marking YYWW HV7022DJ-C LLLLLLLLLL CCCCCCCCCCC AAA 44-Lead Quad Cerpac Chip Carrier (DJ) 44-Lead Quad Cerpac Chip Carrier (DJ) (top view) 1 44 6 40 44-Lead PLCC (PJ) (top view) YY = Year Sealed WW = Week Sealed L = Lot Number A = Assembler ID C = Country of Origin* = “Green” Packaging *May be part of top marking Top Marking Bottom Marking YYWW AAA HV7022PJ-C LLLLLLLLLL CCCCCCCCCCC 44-Lead PLCC (PJ) Parameter Value Supply voltage, VDD -0.3V to +15V Supply voltage, VPP -0.3V to +250V Logic input levels -0.3V to VDD +0.3V Ground current1 1.5A Continuous total power dissipation2 Plastic Ceramic 1200mW 1500mW Operating temperature range Plastic Ceramic -40 OC to +85OC -55OC to +125OC Storage temperature range -65OC to +150OC Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Notes: 1. Duty cycle is limited by the total power dissipated in the package. 2. For operation above 25°C ambient derate linearly to maximum operating temperature at 25mW/°C for plastic and at 15mW/°C for ceramic. Package may or may not include the following marks: Si or Package may or may not include the following marks: Si or

Supertex inc. www.supertex.com Doc.# DSFP-HV7022C B041111 Sym Parameter Min Max Units Conditions IDD VDD supply current - 10 mA fCLK = 4.0MHz, VDD =13.2V IPP VPP supply current - 4.0 mA One output high1 - 100 µA All outputs low or High-Z - 750 All outputs low or High-Z (125 OC) IDDQ Quiescent VDD supply current - 100 µA All VIN = GND or VDD VOH High-level output HVOUT 195 - V IO = -70mA DATA OUT 11 - V IO = -500µA VOL Low-level output HVOUT - 30 V IO = +70mA DATA OUT - 1.0 V IO = +500µA IIH High-level logic input current - 1.0 µA VIH = 12V IIL Low-level logic input current - -1.0 µA VIL = 0V Note: 1. The total number of ON outputs times the duty cycle must not exceed the allowable package power dissipation. Power-up sequence should be the following: 1. Connect ground. 2. Apply VDD. 3. Set all inputs (Data, CLK, Enable, etc.) to a known state. 4. Apply VPP. (The VPP should not drop below VDD or float during operation.) Power-down sequence should be the reverse of the above. Recommended Operating Conditions Sym Parameter Min Max Units VDD Logic supply voltage 10.8 13.2 V VPP High voltage supply - 230 V VIH High-level input voltage VDD = 10.8 8.1 - VVDD = 13.2 9.9 - VIL Low-level input voltage VDD = 10.8 - 2.7 VVDD = 13.2 - 3.3 fCLK Clock frequency - 4.0 MHz TA Operating free-air temperature Plastic -40 +85 Ceramic -55 +125 IOD Allowable pulsed current through output diode - ±300 mA

Supertex inc. www.supertex.com Doc.# DSFP-HV7022C B041111 Sym Parameter Min Max Units Conditions fCLK Clock frequency - 4.0 MHz --- tWH, tWL Pulse duration clock width high or low 125 - ns --- tSUD Data set-up time before falling clock 100 - ns --- tHD Data hold time after falling clock 100 - ns --- tSUC Setup time clock low before VPP↑ or GND↓ 300 - ns --- tSUE Setup time enable high before VPP↑ or GND↓ 300 - ns --- tSUP Setup time polarity high or low before VPP↑ or GND↓ 300 - ns --- tHC Hold time clock high after VPP↑ or GND↓ 500 - ns --- tHE Hold time enable high after VPP↑ or GND↓ 300 - ns --- tHP Hold time polarity high or low after VPP↑ or GND↓ 300 - ns --- tDHL Delay time high to low-level output from clock - 150 ns CL = 10pF tDLH Delay time low to high-level output from clock - 200 ns CL = 10pF tTHL Transition time high to low-level serial output - 200 ns CL = 15pF tTLH Transition time low to high-level serial output - 100 ns CL = 15pF tONH High-level turn-on time HVOUT from enable - 500 ns VOH = 195V, RL = 2.0kΩ to 95V tONL Low-level turn-on time HVOUT from enable - 500 ns VOH = 130V, RL = 2.0kΩ to 30V tOFFH High-level turn-off time HVOUT from enable - 1000 ns VOH = 195V, RL = 2.0kΩ to 95V tOFFL Low-level turn-off time HVOUT from enable - 500 ns VOH = 130V, RL = 2.0kΩ to 30V SR Slew rate, VPP or GND - 45 V/µs One active output driving 4.7nF load to V PP or GND Function Table I/O Relations Inputs Outputs CLK DIR DATA POL OE Shift Reg HVOUT DATA OUT O/P HIGH X X H H H * H * O/P OFF X X L H H * HIGH-Z * O/P LOW X X H L H * L * O/P OFF X X L L H * HIGH-Z * O/P OFF X X X X L * All O/P HIGH-Z * Load S/R, set DIR ↓ L X X X Qn →Qn+1 * Q34 ↓ H X X X Qn →Qn-1 * Q1 No ↓ X X X X * No Change No Change Notes: H = logic high level, L = logic low level, X = irrelevant, ↓ = high-to-low transition Q1 = HV OUT1, Qn = HVOUTn, etc. * = dependent on previous state and whether an O/P or S/R command occurred.

Supertex inc. www.supertex.com Doc.# DSFP-HV7022C B041111 HVOUT Characteristics I (mA) I (mA) Volts 02 04 06 08 0 180 140 100 01 0020 40 60 80 VPP > 40V VDD = 12V & 14V 100 180 140 100 Volts (VPP - HVOUT) Temp = 25OC VDD = 12V Output N-Channel Characteristics through FET Output P-Channel Characteristics through FET Temp = 25OC VDD = 14V VDD = 10V Input and Output Equivalent Circuits VDD DATA INPUT GND VPP GND HVOUT Logic Inputs GND DATA OUT Logic Data Output High Voltage Outputs VDD

Supertex inc. www.supertex.com Doc.# DSFP-HV7022C B041111 Switching Waveforms 50% 50% DATA OUT CLK 50%5 0% 50% tSUD tHD VIH tWL tWH 1/fCLK tTLH 90% 10% tTHL 90% 10% tDLH tDHL DATA INPUT VIH VIL VOH VOL tSUC 10% 90% tHC 50%5 0% VIH VIL 90% POL 10% tSUP SUP tHP 50%50% tSUE tHE 10% 90% 10% 90% tONL tONH tOFFL tOFFH VIH VIL OE HVOUT HVOUT High Impedence High Impedence VIL VOH VOL VOH VOL VOH VOL VOH VOL VOH VOL VOH VOL HVOUT P-CH HVOUT N-CH HVOUT P-CH HVOUT N-CH

Supertex inc. www.supertex.com Doc.# DSFP-HV7022C B041111 Pin Descriptions Pin # Function

1 HVOUT18/17

2 HVOUT17/18

3 HVOUT16/19

4 HVOUT15/20

5 HVOUT14/21

6 HVOUT13/22

7 HVOUT12/23

8 HVOUT11/24

9 HVOUT10/25

10 HVOUT9/26

11 HVOUT8/27

12 HVOUT7/28

13 HVOUT6/29

14 HVOUT5/30

15 HVOUT4/31

16 HVOUT3/32

17 HVOUT2/33

18 HVOUT1/34

19 DATA OUT

21 CLK

22 GND

Pin # Function

23 DIR

24 VDD

25 POL

26 DATA INPUT

27 VPP

29 HVOUT34/1

30 HVOUT33/2

31 HVOUT32/3

32 HVOUT31/4

33 HVOUT30/5

34 HVOUT29/6

35 HVOUT28/7

36 HVOUT27/8

37 HVOUT26/9

38 HVOUT25/10

39 HVOUT24/11

40 HVOUT23/12

41 HVOUT22/13

42 HVOUT21/14

43 HVOUT20/15

44 HVOUT19/16

Note: Pin designation for DIR H/L Example: For DIR = H, pin 1 is HVOUT18 For DIR = L, pin 1 is HVOUT17

Supertex inc. www.supertex.com Doc.# DSFP-HV7022C B041111 44-Lead Quad Cerpac Package Outline (DJ) .650x.650in body, .190in height (max), .050in pitch .150 max .040 x 45O .075 max 6 40 D E1 E Top View View B A Seating Plane e b Note 1 (Index Area) .035 x 45O 0.25 max

3 Places

.025 MIN View B Horizontal Side View Vertical Side View Symbol A A1 A2 b b1 D D1 E E1 e Dimension (inches) MIN .155 .090 .060 REF .050 JEDEC Registration MO-087, Variation AB, Issue B, August, 1991. Drawings not to scale. Supertex Doc. #: DSPD-44CERPACDJ, Version D090808. Note: 1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator.

Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such appl ications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liabilit y to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) ©2013 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Supertex inc.

1235 Bordeaux Drive, Sunnyvale, CA 94089

Tel: 408-222-8888 www.supertex.com HV7022C (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Doc.# DSFP-HV7022C B041111 44-Lead PLCC Package Outline (PJ) .653x.653in body, .180in height (max), .050in pitch Symbol A A1 A2 b b1 D D1 E E1 e R Dimension (inches) .050 BSC .025 JEDEC Registration MS-018, Variation AC, Issue A, June, 1993. † This dimension differs from the JEDEC drawing. Drawings not to scale. Supertex Doc. #: DSPD-44PLCCPJ, Version F031111. 164 044 .150max .048/.042 x 45O D E Top View View B A A2A1 Seating Plane .056/.042 x 45O Base Plane .020min b View B Horizontal Side View Vertical Side View .020max (3 Places) R e Note 1 (Index Area) Note 2 .075max Notes: 1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. 2. Actual shape of this feature may vary.