HV5408X

HV5308 SUTEX | Alldatasheet

Document overview

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Technical content

Features

❏ Processed with HVCMOS® technology ❏ Low power level shifting ❏ Source/sink current minimum 20mA ❏ Shift register speed 8MHz ❏ Latched data outputs ❏ CMOS compatible inputs ❏ Forward and reverse shifting options ❏ Diode to VPP allows efficient power recovery General Description The HV53 and HV54 are low voltage serial to high voltage parallel converters with push-pull outputs. These devices have been designed for use as drivers for AC-electroluminescent displays. They can also be used in any application requiring multiple output high voltage current sourcing and sinking capa- bilities such as driving plasma panels, vacuum fluorescent, or large matrix LCD displays. These devices consist of a 32-bit shift register, 32 latches, and control logic to enable outputs. Q1 is connected to the first stage of the shift register through the Output Enable logic. Data is shifted through the shift register on the low to high transition of the clock. The HV54 shifts in the counterclockwise direction when viewed from the top of the package and the HV53 shifts in the clockwise direction. A data output buffer is provided for cascading devices. This output reflects the current status of the last bit of the shift register (32). Operation of the shift register is not affected by the LE (latch enable) or the OE (output enable) inputs. Transfer of data from the shift register to the latch occurs when the LE input is high. The data in the latch is retained when LE is low. Device 44 J-Lead Quad 44 J-Lead Quad 44 Lead Quad 44 J-Lead Quad Ceramic Chip Carrier Plastic Chip Carrier Plastic Gullwing Die Ceramic Chip Carrier (MIL-STD-883 Processed*) HV5308 HV5308DJ HV5308PJ HV5308PG HV5308X RBHV5308DJ HV5408 HV5408DJ HV5408PJ HV5408PG HV5408X RBHV5408DJ For Hi-Rel process flows, please refer to perfer to page 5-3 in the Databook.

Ordering Information

Supply voltage, VDD 2 -0.5V to +16V Supply voltage, VPP -0.5V to +90V Logic input levels2 -0.5 to VDD + 0.5V Ground current3 1.5A Continuous total power dissipation 4 Plastic 1200mW Ceramic 1500mW Operating temperature range Plastic -40 °C to +85°C Ceramic -55 °C to 125°C Storage temperature range -65 °C to +150°C Lead temperature 1.6mm (1/16 inch) 260 °C from case for 10 seconds Notes: 1. Device will survive (but operation may not be specified or guaranteed) at these extremes. 2. All voltages are referenced to GND. 3. Duty cycle is limited by the total power dissipated in the package. 4. For operation above 25 °C ambient derate linearly to maximum operating temperature at 20mW/°C for plastic and at 15mW/°C for ceramic.

Recommended Operating Conditions (over -40 to 85°C for plastic and -55°C to 125°C for ceramic) Symbol Parameter Min Max Units VDD Logic Voltage Supply 10.8 13.2 V VPP High Voltage Supply 8.0 80 V VIH Input HIGH Voltage V DD-2 V DD V VIL Input LOW Voltage 0 2 V fCLK Clock Frequency 0 8 MHz Note: Power-up sequence should be the following: 1. Connect ground. 2. Apply V DD. 3. Set all inputs (Data, CLK, LE, etc.) to a known state. 4. Apply V PP. 5. The V PP should not fall below VDD or float during operation. Power-down sequence should be the reverse of the above. Electrical Characteristics (VPP = 60V, VDD = 12V, TA =25°C) DC Characteristics Symbol Parameter Min Max Units Conditions IPP VPP Supply Current 0.5 mA HVoutputs HIGH to LOW IDDQ IDD Supply Current (Quiescent) 100 µA All inputs = VDD or GND IDD IDD Supply Current (Operating) 15 mA V DD = VDD max, fCLK = 8 MHz VOH (Data) Shift Register Output Voltage 10.5 V I O = 100µA VOL (Data) Shift Register Output Voltage 1 V I O = 100µA IIH Current Leakage, any input 1 µAV IN = VDD IIL Current Leakage, any input -1 µAV IN = 0 VOC HV Output Clamp Diode Voltage -1.5 V I OL = -100mA VOH HV Output when Sourcing 52 V I OH = -20mA, -40 to 85°C VOL HV Output when Sinking 8 V I OL = 20mA, -40 to 85°C VOH HV Output when Sourcing 52 V I OH = -15mA, -55 to 125°C VOL HV Output when Sinking 8 V I OL = 15mA, -55 to 125°C AC Characteristics Symbol Parameter Min Max Units Conditions fCLK Clock Frequency 8 MHz tWL or tWH Clock width, HIGH or LOW 62 ns tSU Setup time before CLK rises 25 ns tH Hold time after CLK rises 10 ns tDLH (Data) Data Output Delay after L to H CLK 110 ns C L = 15pF tDHL (Data) Data Output Delay after H to L CLK 110 ns C L = 15pF tDLE LE Delay after L to H CLK 50 ns tWLE Width of LE Pulse 50 ns tSLE LE Setup Time before L to H CLK 50 ns tON Delay from LE to HVOUT, L to H 500 ns tOFF Delay from LE to HVOUT, H to L 500 ns HV5308/HV5408

Q w/ S/R LOW Data Valid50% 50%Data Input Clock Data Out 50% 50% 50% tSU tH tWL tWH 50% 50% tDLH tDHL 50% tWLEtDLE tSLE 50% 50% tON 10% Q w/ S/R HIGH 90% 90%10% tOFF VIH VIL VIH VIL VOH VOL VOH VOL VIH VOL VOH VOL VOH VOL VDD Input GND VPP GND HVOUT Logic Inputs GND Data Out Logic Data Output High Voltage Outputs VDD Input and Output Equivalent Circuits Switching Waveforms

32 Outputs Total

32 Bit

Data Input CLK* Data Output HH LL XN o No Change * = LOW-to-HIGH level transition Data Input LE OE HV Output XX L All HVOUT = LOW XL H Previous Latched Data HHH H LHH L Functional Block Diagram

39 38 37 36 35 34 33 32 31 30 29 7 8 9 10 11 12 13 14 15 16 17 top view 44-pin J-Lead Package Pin Configuration HV53

44 Pin J-Lead Package

4H V OUT 14 26 Latch Enable 5H V OUT 13 27 Data In 6H V OUT 12 28 Output Enable 7H V OUT 11 29 N/C 8H V OUT 10 30 HV OUT 32 9H V OUT 93 1 H V OUT 31

10 HV OUT 83 2 H V OUT 30

11 HV OUT 73 3 H V OUT 29

12 HV OUT 63 4 H V OUT 28

13 HV OUT 53 5 H V OUT 27

14 HV OUT 43 6 H V OUT 26

15 HV OUT 33 7 H V OUT 25

16 HV OUT 23 8 H V OUT 24

17 HV OUT 13 9 H V OUT 23

18 Data Out 40 HV OUT 22

19 N/C 41 HV OUT 21

20 N/C 42 HV OUT 20

21 N/C 43 HV OUT 19

22 Clock 44 HV OUT 18

4H V OUT19 26 Latch Enable 5H V OUT20 27 Data In 6H V OUT21 28 Output Enable 7H V OUT22 29 N/C 8H V OUT23 30 HV OUT1 9H V OUT24 31 HV OUT2

10 HV OUT25 32 HV OUT3

11 HV OUT26 33 HV OUT4

12 HV OUT27 34 HV OUT5

13 HV OUT28 35 HV OUT6

14 HV OUT29 36 HV OUT7

15 HV OUT30 37 HV OUT8

16 HV OUT31 38 HV OUT9

17 HV OUT32 39 HV OUT10

18 Data Out 40 HV OUT11

19 N/C 41 HV OUT12

20 N/C 42 HV OUT13

21 N/C 43 HV OUT14

22 Clock 44 HV OUT15

1235 Bordeaux Drive, Sunnyvale, CA 94089

TEL: (408) 744-0100 • FAX: (408) 222-4895 www.supertex.com 12/13/010 ©2001 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited. HV5308/HV5408 4041424344 39 38 37 36 35 34 18 222019 12 13 14 15 16 17 Pin Configuration HV53

44 Pin Quad Plastic Gullwing Package

9H V OUT 14 31 Latch Enable

10 HV OUT 13 32 Data In

11 HV OUT 12 33 Output Enable

12 HV OUT 11 34 N/C

13 HV OUT 10 35 HV OUT 32

14 HV OUT 93 6 H V OUT 31

15 HV OUT 83 7 H V OUT 30

16 HV OUT 73 8 H V OUT 29

17 HV OUT 63 9 H V OUT 28

18 HV OUT 54 0 H V OUT 27

19 HV OUT 44 1 H V OUT 26

20 HV OUT 34 2 H V OUT 25

21 HV OUT 24 3 H V OUT 24

22 HV OUT 14 4 H V OUT 23

9H V OUT19 31 Latch Enable

10 HV OUT20 32 Data In

11 HV OUT21 33 Output Enable

12 HV OUT22 34 N/C

13 HV OUT23 35 HV OUT1

14 HV OUT24 36 HV OUT2

15 HV OUT25 37 HV OUT3

16 HV OUT26 38 HV OUT4

17 HV OUT27 39 HV OUT5

18 HV OUT28 40 HV OUT6

19 HV OUT29 41 HV OUT7

20 HV OUT30 42 HV OUT8

21 HV OUT31 43 HV OUT9

22 HV OUT32 44 HV OUT10

44-pin Quad Plastic Gullwing Package