HV510 SUTEX | Alldatasheet

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Technical content

Features

❏ HVCMOS® technology ❏ Operating output voltage of 240V ❏ Low power level shifting from 5V to 240V ❏ Shift register speed 8MHz @ VDD = 5V ❏ 12 latched data outputs ❏ Output polarity and blanking ❏ CMOS compatible inputs ❏ Forward and reverse shifting options Absolute Maximum Ratings1 Supply voltage, VDD -0.5V to +6V Supply voltage, VPP VDD to 260V Logic input levels -0.5V to V DD +0.5V Ground current3 0.3A High voltage supply current2 0.25A Continuous total power dissipation3 750mW Operating temperature range -40 °C to +85°C Storage temperature range -65 °C to +150°C Notes: 1. All voltages are referenced to GND. 2. Connection to all power and ground pads is required. Duty cycle is limited by the total power dissipated in the package. 3. For operation above 25 °C ambient derate linearly to 85°C at 12mW/°C.

Symbol Parameter Min Typ Max Units Conditions fCLK Clock frequency 8 MHz tW Clock width high and low 62 ns tSU Data setup time before clock rises 35 ns tH Data hold time after clock rises 30 ns tWLE Width of latch enable pulse 80 ns tDLE LE delay time after rising edge of clock 35 ns tSLE LE setup time before rising edge of clock 40 ns tON, tOFF Time from latch enable to HVOUT 6.0 µsC L = 20pF tDHL Delay time clock to data out high to low 125 ns C L = 20pF tDLH Delay time clock to data out low to high 125 ns C L = 20pF tr, tf All logic inputs 5 ns Note: 1. Shift register speed can be as low as DC as long as Data Set-up and Hold Time meet the spec. Symbol Parameter Min Typ Max Units Conditions IDD VDD supply current 4 mA f CLK = 8MHz, fDATA = 4MHz LE = LOW IDDQ Quiescent VDD supply current 200 µA All VIN = 0V or VDD IPP High voltage supply current 0.25 mA V PP = 240V All outputs high 0.25 mA V PP = 240V All outputs low IIH High-level logic input current 10 µAV IH = VDD IIL Low-level logic input current -10 µAV IL = 0V VOH High-level output HVOUT 220 V V PP = 240V, IHVOUT = -0.5mA 175 V V PP = 200V, lHVOUT = -0.5mA Data out V DD -1V V I DOUT = -100µA VOL Low-level output HV OUT 25 V V DD = 5V, IHVOUT = 1mA Data out 1.0 V I DOUT = 100µA VOC HVOUT clamp voltage V PP +1.5 V I OL = 1mA -1.5 V I OL = -1mA IOH Output Source Current 1.0 mA V PP = 240V 0.8 mA V PP = 200V Symbol Parameter Min Typ Max Units VDD Logic supply voltage 4.5 5.0 5.5 V VPP High voltage supply 60 240 V VIH High-level input voltage V DD -0.9 V DD V VIL Low-level input voltage 0 0.9 V TA Operating free-air temperature -40 +85 °C Notes: Power-up sequence should be the following: 1. Connect ground. 4. Apply V PP. 2. Apply V DD.5 . The VPP should not drop below VDD or float during operation. 3. Set all inputs (Data, CLK, Enable, etc.) to a known state. Power-down sequence should be the reverse of the above. Electrical Characteristics (for VDD = 5V, VPP = 240V, TA = 250C) DC Characteristics Recommended Operating Conditions AC Characteristics1 (For VDD = 5V, VPP = 200V, TA = 25°C)

Data Valid50% 50%Data In (DIOA/DIOB) CLK 50% 50% 50% tSU tH tWL tWH 50% 50% tDLH tDHL 50% tWLEtDLE tSLE 50% 50% tON 10% HVOUT w/ S/R HIGH 90% 90%10% tOFF VIH VIL VIH VIL VOH VOL VOH VOL VIH VOL VOH VOL VOH VOL Data Out (DIOA/DIOB) VDD Input GND VPP HVGND HVOUT Logic Inputs GND Data Out Logic Data Output High Voltage Outputs VDD Input and Output Equivalent Circuits Switching Waveforms

8 Additional

12 Latches

Function Shift Reg HV Outputs Data Out 12 … 12 1 2 … 12 * All on X X X L L X * * … *HH … H* All off X X X L H X * * … *L L … L* DIOA ↑ XXXL Q n→ Qn-1 —D IOB DIOB ↑ XXXH Q n→ Qn+1 —D IOA Notes: H = high level, L = low level, X = irrelevant, ↑ = low-to-high transition, ↓ = high-to-low transition. * = dependent on previous stage’s state before the last CLK or last LE high. Data CLK LE BL POL DIR I/O relation Function Table L/T = Level Translator

4 POL

6 DIR

7 LGND

8 HVGND

9 CLK

12 V PP

13 HV OUT12/1

14 HV OUT11/2

15 HV OUT10/3

16 HV OUT9/4

17 HV OUT8/5

18 HV OUT7/6

19 HV OUT6/7

20 HV OUT5/8

21 HV OUT4/9

22 HV OUT3/10

23 HV OUT2/11

24 HV OUT1/12

Note: Pin designation for DIR = H/L Example: for DIR = H, Pin 13 is HV OUT12 for DIR = L, Pin 13 is HVOUT1 Pin Configurations Package Outline HV510

24 Pin SOW Package