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Technical content
Features
► 32 Channels of high voltage analog switch ► 2:1 Multiplexer / Demultiplexer ► 3.3 or 5.0V CMOS input logic level ► HVCMOS technology for high performance ► Very low quiescent power dissipation -10µA ► Low parasitic capacitance ► DC to 50MHz analog signal frequency ► -60dB typical OFF-isolation at 5.0MHz ► CMOS logic circuitry for low power ► Excellent noise immunity ► Flexible operating supply voltages
Applications
► Electromechanical relay replacement in medical ultrasound probes. General Description The Supertex HV2808 is a low harmonic distortion, 32-channel, high voltage analog switch integrated circuit (IC), designed for use in medical ultrasound imaging systems as a probe selection relay replacement. It serves as a 16PDT (16-pole, double throw) high voltage analog switch array. HV2808 is a very fast transducer multiplexer that consumes minimal power and emits no audible noise. Using HVCMOS technology, this device combines high voltage bilateral DMOS switches and low power CMOS logic to provide efficient control of high voltage analog signals. The device is suitable for various combinations of high voltage supplies, e.g., V PP/VNN: +40V/-160V, +100V/-100V, and +160V/-40V. The HV2808 comes in an 8x8x1.0mm, 56-Lead QFN package. Compared to an electromechanical relay, it not only saves considerable PCB area, but also saves on the PCB assembled height.
Supertex inc. www.supertex.com HV2808 Doc.# DSFP-HV2808 C121712 Absolute Maximum Ratings Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Parameter Value VDD logic supply -0.5V to +6.5V VPP-VNN differential supply 220V VPP positive supply -0.5V to VNN +200V VNN negative supply +0.5V to -200V Logic input voltage -0.5V to VDD +0.3V Analog signal range VNN to VPP Peak analog signal current/channel 3.0A Storage temperature -65°C to 150°C Thermal resistance, θja 27OC/W Thermal resistance, θjc 0.5OC/W Recommended Operating Conditions Sym Parameter Value VDD Logic power supply voltage 3.0 to 5.5V VPP Positive high voltage supply +40 to VNN +200V VNN Negative high voltage supply -40 to -160V VIH High level input voltage 0.9VDD to VDD VIL Low level input voltage 0 to 0.1VDD VSIG Analog signal voltage peak-to-peak VNN +10V to VPP -10V TA Operating free air temperature 0 to 70OC Notes: 1. Power up/down sequence is arbitrary except GND must be powered-up first and powered-down last. 2. VSIG must be VNN ≤ VSIG ≤ VPP or floating during power up/down transition. 3. Rise and fall times of power supplies VDD, VPP, and VNN should not be less than 1.0msec. Pin Configuration Product Marking 56-Lead QFN 56-Lead QFN (top view) Package may or may not include the following marks: Si or L = Lot Number YY = Year Sealed WW = Week Sealed A = Assembler ID C = Country of Origin = “Green” Packaging HV2808K6 LLLLLLLLL YYWW AAA CCC Typical Thermal Characteristics Package θja 56-Lead QFN (K6) 21OC/W
Ordering Information
Part Number Package Option Packing HV2808K6-G 56-Lead QFN (8x8) 250/Tray HV2808K6-G M937 56-Lead QFN (8x8) 2000/Reel -G indicates package is RoHS compliant (‘Green’)
Supertex inc. www.supertex.com HV2808 Doc.# DSFP-HV2808 C121712 Sym Parameter 0OC +25OC +70OC Unit Conditions Min Max Min Typ Max Min Max RONS Small signal switch ON-resistance - 30 - 26 38 - 48 Ω I SIG = 5.0mA VPP = +40V, VNN = -160V- 25 - 22 27 - 32 ISIG = 200mA - 25 - 22 27 - 30 ISIG = 5.0mA VPP = +100V, VNN = -100V- 18 - 18 24 - 27 ISIG = 200mA - 23 - 20 25 - 30 ISIG = 5.0mA VPP = +160V, VNN = -40V- 22 - 16 25 - 27 ISIG = 200mA ΔRONS Small signal switch ON-resistance matching - 20 - 5.0 20 - 20 % I SIG = 5.0mA, VPP = +100V, VNN = -100V RONL Large signal switch ON-resistance - - - 15 - - - Ω V SIG = VPP -10V, ISIG = 1A ISOL Switch OFF-leakage per switch - 5.0 - 1.0 10 - 15 μA VSIG = VPP -10V, VNN +10V VOS DC offset switch OFF - 300 - 100 300 - 300 mV 100kΩ load DC offset switch ON - 500 - 100 500 - 500 IPPQ Quiescent VPP supply current - - - 10 50 - - μA All switches OFF INNQ Quiescent VNN supply current - - - -10 -50 - - IPPQ Quiescent VPP supply current - - - 10 50 - - μA All switches ON, I SW = 5.0mAINNQ Quiescent VNN supply current - - - -10 -50 - - fSW Output switching frequency - - - - 50 - - kHz Duty cycle = 50% IPP Average VPP supply current - 13 - - 14 - 16 mA VPP= +40V, VNN = -160V All output switches are turning ON and OFF at 50kHz with no load PP= +100V, VNN = -100V VNN = -40V INN Average VNN supply current - 13 - - 14 - 16 mA VPP = +40V, VNN = -160V All output switches are turning ON and OFF at 50kHz with no load PP= +100V, VNN = -100V VNN = -40V IDD VDD supply current - 0.1 - - 0.1 - 0.1 mA VDD = 5.0V@ 50kHz CW IDDQ Quiescent VDD supply current - 10 - - 10 - 10 μA All logic inputs are static CIN Logic input capacitance - 10 - - 10 - 10 pF --- * See Test Circuits on page 5
Supertex inc. www.supertex.com HV2808 Doc.# DSFP-HV2808 C121712 Sym Parameter 0OC +25OC +70OC Unit ConditionsMin Max Min Typ Max Min Max tON Turn ON time - 30 - 15 30 - 30 μs VSIG = VPP -10V, VPP = +100V, RLOAD = 10kΩ, VNN = -100VtOFF Turn OFF time - 30 - 15 30 - 30 dv/dt Maximum VSIG slew rate - 20 - - 20 - 20 V/ns VPP = +40V, VNN = -160V - 20 - - 20 - 20 VPP = +100V, VNN = -100V - 20 - - 20 - 20 VPP = +160V, VNN = -40V KO OFF isolation dB f = 5.0MHz, 1.0kΩ//15pF load -58 - -58 - - -58 - f = 5.0MHz, 50Ω load K CR Switch crosstalk -60 - -60 -70 - -60 - dB f = 5.0MHz, 50Ω load IID Output switch isolation diode current - 300 - - 300 - 300 mA 300ns pulse width, 2.0% duty cycle C SG(OFF) OFF capacitance SW to GND - 14 - 9.0 14 - 14 pF VSIG = 0V, f = 1.0MHz CSG(ON) ON capacitance SW to GND - 33 - 23 33 - 33 pF VSIG = 0V, f = 1.0MHz One SW on, one SW offCapacitance Y to GND - 33 - 23 33 - 33 +VSPK Output voltage spike SW - 250 - - 250 - 250 mV VPP = +40V, VNN = -160V, RLOAD = 50Ω-VSPK - 250 - - 250 - 250 +VSPK - 250 - - 250 - 250 VPP = +100V, VNN = -100V, RLOAD = 50Ω-VSPK - 250 - - 250 - 250 +VSPK - 250 - - 250 - 250 VPP = +160V, VNN = -40V, RLOAD = 50Ω-VSPK - 250 - - 250 - 250 +VSPK Output voltage spike Y - 250 - - 250 - 250 mV VPP = +40V, VNN = -160V, RLOAD = 50Ω-VSPK - 250 - - 250 - 250 +VSPK - 250 - - 250 - 250 VPP = +100V, VNN = -100V, RLOAD = 50Ω-VSPK - 250 - - 250 - 250 +VSPK - 250 - - 250 - 250 VPP = +160V, VNN = -40V, RLOAD = 50Ω-VSPK - 250 - - 250 - 250 QC Charge injection - - - 1020 - - - pC VPP = +40V, VNN = -160V * See Test Circuits on page 5 Truth Table A/B Switch Status
Supertex inc. www.supertex.com HV2808 Doc.# DSFP-HV2808 C121712 Test Circuits SW1SW0 Y01 SW1SW0 Y01 SW1 SW0 Y01 SW1SW0 Y01 SW1SW0 Y01 SW1 SW0 Y01 SW1SW0 Y01 SW1SW0 Y01 VPP -10V Switch OFF Leakage DC Offset ON/OFF TON/TOFF Test Circuit OFF Isolation Isolation Diode Current Charge Injection Output Voltage Spike SW Output Voltage Spike Y KO = 20Log VOUT VIN VIN = 10VP-P @5.0MHz RLOAD 10kΩ VOUT VOUT VOUT VOUT VOUT VOUT ΔVOUT NC NC NC NC NC VPP -10V ISOL VSIG IID VNN Q = 1000pF • ∆VOUT 50Ω 50Ω RL 1kΩ 1000pF +VSPK -VSPK +VSPK -VSPK RL 1kΩ 50Ω RLOAD 100kΩ 50Ω Crosstalk KCR = 20Log VOUT VIN Y01 50Ω NC Y23 SW1 SW3 SW2 SW0 VIN = 10VP-P @5.0MHz NC NC NC NC NC VPP VPP VDD 5.0V VNN VNN GND VPP VPP VDD 5.0V VNN VNN GND VPP VPP VDD 5.0V VNN VNN GND VPP VPP VDD 5.0V VNN VNN GND VPP VPP VDD 5.0V VNN VNN GND VPP VPP VDD 5.0V VNN VNN GND VPP VPP VDD 5.0V VNN VNN GND VPP VPP VDD 5.0V VNN VNN GND VPP VPP VDD 5.0V VNN VNN GND VOUT NC
Supertex inc. www.supertex.com HV2808 Doc.# DSFP-HV2808 C121712 Pin Function
1 Y2829
2 SW29
3 SW30
4 Y3031
5 SW31
7 VDD
8 A/B
9 GND
10 SW0
11 Y01
12 SW1
13 SW2
14 Y23
15 SW3
16 SW4
17 Y45
18 SW5
19 SW6
20 Y67
21 SW7
22 SW8
23 Y89
24 SW9
25 SW10
26 Y1011
27 SW11
28 SW12
29 Y1213
30 SW13
31 VNN
32 SW14
33 Y1415
34 SW15
35 VPP
36 VPP
37 SW16
38 Y1617
39 SW17
40 VNN
41 SW18
42 Y1819
43 SW19
44 SW20
45 Y2021
46 SW21
47 SW22
48 Y2223
49 SW23
50 SW24
51 Y2425
52 SW25
53 SW26
54 Y2627
55 SW27
56 SW28
VSUB (Thermal Pad) The central thermal pad on the bottom of package must be connected to VNN externally
Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such appl ications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liabilit y to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) ©2013 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Supertex inc.
1235 Bordeaux Drive, Sunnyvale, CA 94089
Tel: 408-222-8888 www.supertex.com HV2808 (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Doc.# DSFP-HV2808 C121712 56-Lead QFN Package Outline (K6) 8.00x8.00mm body, 1.00mm height (max), 0.50mm pitch Symbol A A1 A3 b D D2 E E2 e L L1 θ Dimension (mm) MIN 0.80 0.00 0.20 REF 0.50 BSC 0.30 0.00 0O JEDEC Registration MO-220, Variation VLLD-2, Issue K, June 2006. * This dimension is not specified in the JEDEC drawing. † This dimension differs from the JEDEC drawing. Drawings are not to scale. Supertex Doc.#: DSPD-56QFNK68X8P050, Version A031010. Notes: 1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. 2. Depending on the method of manufacturing, a maximum of 0.15mm pullback (L1) may be present. 3. The inner tip of the lead may be either rounded or square. Seating Plane Top View Side View Bottom View D E View B View B Note 3 Note 2 Note 1 (Index Area D/2 x E/2) Note 1 (Index Area D/2 x E/2) e b L A θ