HV2601FG-G

HV2601 SUTEX | Alldatasheet

Document overview

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• PDF pages: 7

Technical content

Features

/boxshadowdwn HVCMOS technology for high performance /boxshadowdwn 16 Channels of high voltage analog switch /boxshadowdwn 3.3V input logic level compatible /boxshadowdwn 20MHz data shift clock frequency /boxshadowdwn Very low quiescent power dissipation -10µA /boxshadowdwn Low parasitic capacitance /boxshadowdwn DC to 10MHz analog signal frequency /boxshadowdwn -60dB typical off-isolation at 5MHz /boxshadowdwn CMOS logic circuitry for low power /boxshadowdwn Excellent noise immunity /boxshadowdwn Cascadable serial data register with latches /boxshadowdwn Flexible operating supply voltages

Applications

/boxshadowdwn Medical ultrasound imaging /boxshadowdwn NDT metal fl aw detection /boxshadowdwn Piezoelectric transducer drivers /boxshadowdwn Optical MEMS modules General Description The Supertex HV2601 is a low charge injection 16-channel high voltage analog switch integrated circuit (IC) intended for use in applications requiring high voltage switching controlled by low voltage control signals, such as medical ultrasound imaging and other piezoelectric transducer drivers. Input data is shifted into a 16-bit shift register that can then be retained in a 16-bit latch. To reduce any possible clock feed through noise, the latch enable bar should be left high until all bits are clocked in. Data are clocked in during the rising edge of the clock. Using HVCMOS technology, this device combines high voltage bilateral DMOS switches and low power CMOS logic to provide effi cient control of high voltage analog signals. The device is suitable for various combinations of high voltage supplies, e.g., V PP/VNN: +40V/-160V, +100V/-100V, and +160V/-40V. Block Diagram Low Charge Injection 16-Channel High Voltage Analog Switch LE CL D LE CL

16 BIT

D LE CL D LE CL D LE CL D LE CL

Ordering Information

-G indicates package is RoHS compliant (‘Green’) Absolute Maximum Ratings VDD Logic supply -0.5V to +7V VPP-VNN differential supply 220V VPP Positive supply -0.5V to V NN+200V VNN Negative supply +0.5V to -200V Logic input voltage -0.5V to V DD +0.3V Analog signal range V NN to VPP Peak analog signal current/channel 3.0A Storage temperature -65°C to 150°C Power dissipation 48-Lead TQFP 1W *Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Operation Conditions Symbol Parameter Value VDD Logic power supply voltage 3.0V to 5.5V VPP Positive high voltage supply 40V to V NN +200V VNN Negative high voltage supply -40V to –160V VIH High level input voltage 0.9V DD to VDD VIL Low level input voltage 0V to 0.1V DD VSIG Analog signal voltage peak-to-peak V NN+10V to VPP-10V TA Operating free air temperature 0°C to 70°C Notes: 1 Power up/down sequence is arbitrary except GND must be powered-up fi rst and powered-down last. 2 V SIG must be within VNN and VPP or fl oating during power up/down transition. 3 Rise and fall times of power supplies VDD, VPP, and VNN should not be less than 1.0msec.

0°C +25°C +70°C Units Conditions Min Max Min Typ Max Min Max RONS Small Signal Switch On-Resistance 30 26 38 48 Ω ISIG = 5mA VPP = +40V VNN = -160V25 22 27 32 I SIG = 200mA 25 22 27 30 I SIG = 5mA VPP = +100V VNN = -100V18 18 24 27 I SIG = 200mA 23 20 25 30 I SIG = 5mA VPP = +160V VNN = -40V22 16 25 27 I SIG = 200mA ∆RONS Small Signal Switch On-Resistance Matching 20 5.0 20 20 % ISIG = 5mA, VPP = +100V, VNN = -100V RONL Large Signal Switch On-Resistance 15 Ω V SIG=VPP-10V, ISIG=1A ISOL Switch Off Leakage per Switch* 5.0 1.0 10 15 µA V SIG = VPP-10V and VNN+10V VOS DC offset Switch off* 300 100 300 300 mV 100KΩ LoadDC offset Switch on* 500 100 500 500 mV IPPQ Quiescent VPP supply current 10 50 µA All switches off INNQ Quiescent VNN supply current -10 -50 µA All switches off IPPQ Quiescent VPP supply current 10 50 µA All switches on, I SW = 5mA INNQ Quiescent VNN supply current -10 -50 µA All switches on, I SW = 5mA ISW Switch output peak fSW Output switching frequency 50 kHz Duty cycle = 50% IPP Average VPP supply current 6.5 7.0 8.0 mA VPP = +40V VNN = -160V All output switches are turning On and Off at 50KHz with no load. V PP = +100V VNN = -100V4.0 5.5 5.5 VPP = +160V VNN = -40V4.0 5.0 5.5 INN Average VNN supply current 6.5 7.0 8.0 mA VPP = +40V VNN = -160V VPP = +100V VNN = -100V4.0 5.0 5.5 VPP = +160V IDD Average VDD supply current 4.0 4.0 4.0 mA f CLK = 5MHz, VDD = 5.0V IDDQ Quiescent VDD supply current 10 10 10 µA All logic inputs are static CIN Logic input capacitance 10 10 10 pF (over recommended operating conditions unless otherwise noted) * See Test Circuits on page 5

(over recommended operating conditions, VDD= 5.0V, tR= tF ≤ 5ns, 50% duty cycle, CLOAD= 20pF unless otherwise noted) Sym Parameter 0°C +25°C +70°C Units ConditionsMin Max Min Typ Max Min Max tSD Set Up Time Before LE Rises 25 25 25 ns tWLE Time Width of LE 56 56 56 ns VDD = 3.0V 12 12 12 V DD = 5.0V tDO Clock Delay Time to Data out 5 01 0 05 0 7 81 0 05 01 0 0 ns VDD = 3.0V 15 40 15 30 40 15 40 V DD= 5.0V tWCL Time Width of CL 55 55 55 ns tSU Set Up Time Data to Clock 21 21 21 ns VDD= 3.0V 77 7V DD= 5.0V tH Hold Time Data from Clock 22 2n s V DD= 3.0 or 5.0V fCLK Clock Frequency 88 8 MHz VDD= 3.0V 20 20 20 V DD= 5.0V tR,tF Clock rise and fall Times 50 50 50 ns TON Turn on Time* 5.0 5.0 5.0 µs V SIG = VPP-10V, RLOAD = 10KΩ TOFF Turn off Time* 5.0 5.0 5.0 µs V SIG = VPP-10V, RLOAD = 10KΩ dv/dt Maximum V SIG Slew Rate 20 20 20 V PP = +40V, VNN = -160V 20 20 20 V PP = +100V, VNN = -100V 20 20 20 V PP = +160V, VNN = -40V KO Off Isolation* -30 -30 -33 -30 dB f = 5.0MHz, 1KΩ//15pF load -58 -58 -58 f = 5.0MHz, 50Ω load KCR Switch Crosstalk* -60 -60 -70 -60 dB f = 5.0MHz, 50Ω load IID Output Switch Isolation Diode Current 300 300 300 mA 300ns pulse width, 2.0% duty cycle CSG(OFF) Off Capacitance SW to GND 5.0 17 5.0 12 17 5.0 17 pF 0V, f = 1.0MHz CSG(ON) On Capacitance SW to GND 25 50 25 38 50 25 50 pF 0V, f = 1.0MHz +VSPK Output Voltage Spike* 150 mV VPP = +40V, VNN = -160V, RLOAD = 50ohm-VSPK +VSPK

150 VPP = +100V, VNN = -100V,

RLOAD = 50ohm-VSPK +VSPK

150 VPP = +160V, VNN = -40V,

RLOAD = 50ohm-VSPK QC Charge Injection* 820 pC VPP= +40V, VNN= -160V, VSIG= 0V

600 V PP= +100V, VNN= -100V, VSIG= 0V

350 V PP= +160V, VNN= -40V, VSIG= 0V

• See Test Circuits on page 5

L Switch Off Leakage per Switch DC Offset Switch ON/OFF TURN (TON/TOFF) ON/OFF TIME OFF Isolation Output Switch Isolation Diode Current Switch Crosstalk Charge Injection Output Voltage Spike

Notes: 1. Th 16 switches operate independently. 2. Serial data is clocked in on the L to H transition of the CLK. 3. All 16 switches go to a state retaining their latched condition at the rising edge of LE. When LE is low the shift registers data fl ow through the latch. 4. D OUT is high when data in the register 15 is high. 5. Shift registers clocking has no effect on the switch states if LE is high. 6. The CL clear input overrides all other inputs. Logic Timing Waveforms DATA IN LE CLOCK DATA OU T OFF ON OUT (TYP) V 50% 50% 50%50% t WLE t SD t SU t h 50%50% t OFF 50% t DO t ON t WC L CLR D N–1 D N D N+1 50%50% 90% 10%

Doc.# DSFP - HV2601 NR101705 HV2601Pin Confi guration and Package Outline - 48-Lead TQFP (1.4mm) (FG) BSC 0° − 7° 0.354 ± 0.01 (8.992 ± 0.254) 0.275 ± 0.004 (6.985 ± 0.102) 0.008 ± 0.003 (0.2032 ± 0.0762) 0.020 (0.508) 0.055 ± 0.004 (1.397 ± 0.102) 0.039 (0.991) 0.059 ± 0.004 (1.498 ± 0.102) 0.354 ± 0.01 (8.992 ± 0.254) 0.024 ± 0.008 (0.610 ± 0.203) 0.275 ± 0.004 (6.985 ± 0.102) Measurement Legend = Dimensions in Inches Dimensions in Millimeters Pin 1 Pin 12 Pin Name TQFP-48 SW4B 3 SW4A 4 SW3B 5 SW3A 6 SW2B 7 SW2A 8 SW1B 9 SW1A 10 SW0B 11 SW0A 12 VNN 13 VPP 15 GND 17 VDD 18 DIN 19 CLK 20 LE 21 CLR 22 DOUT 23 NC 24 SW15B 25 SW15A 26 SW14B 27 SW14A 28 SW13B 29 SW13A 30 SW12B 31 SW12A 32 SW11B 33 SW11A 34 SW10B 37 SW10A 38 SW9B 39 SW9A 40 SW8B 41 SW8A 42 SW7B 43 SW7A 44 SW6B 45 SW6A 46 SW5B 47 SW5A 48 NC = No Internal Connection.