HV2116 SUTEX | Alldatasheet
Document overview
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Technical content
Features
■■ HVCMOS® technology for high performance ■■ Very low quiescent power dissipation – 10µA ■■ Output On-resistance typically 22 ohms ■■ Low parasitic capacitances ■■ DC to 10MHz analog signal frequency ■■ -50dB typical output off isolation at 5MHz ■■ CMOS logic circuitry for low power ■■ Excellent noise immunity ■■ On-chip shift register, and latch logic circuitry ■■ Flexible high voltage supplies ■■ Surface mount package available General Description Not recommended for new designs. Please use HV202 instead. This device is an 8-channel high-voltage analog switch integrated circuit (IC) intended for use in applications requiring high voltage switching controlled by low voltage control signals, such as ultra- sound imaging and printers. Input data is shifted into an 8-bit shift register which can then be retained in an 8-bit latch. To reduce any possible clock feedthrough noise, Latch Enable (LE) should be left high until all bits are clocked in. Using HVCMOS technol- ogy, this switch combines high voltage bilateral DMOS switches and low power CMOS logic to provide efficient control of high voltage analog signals. This IC is suitable for various combinations of high voltage sup- plies, e.g., for HV2116 +40V/-120V, or +80V/-80V or +150V/-10V. Absolute Maximum Ratings* VDDlogic power supply voltage -0.5V to +18V VPP - VNN supply voltage 174V VPP positive high voltage supply -0.5V to +160V VNN Negative high voltage supply +0.5V to -160V Logic input voltages -0.5V to V DD +0.3V Analog signal range V NN to VPP Peak analog signal current/channel 3.0A Storage temperature -65 °C to +150°C Power dissipation 1.2W *Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. – OBSOLETE –
30 26 32 35 I SIG = 5mA V PP = 40V, 25 22 27 32 I SIG = 200mA V NN = –120V Small Signal Switch (ON) R ONS 25 22 27 30 ohms I SIG = 5mA V PP = 80V, Resistance 18 18 20 23 I SIG = 200mA V NN = –80V 23 20 25 30 I SIG = 5mA V PP = 150V, 22 16 25 27 I SIG = 200mA V NN = –10V Small Signal Switch (ON) ∆RONS 20 5.0 20 20 % I SW = 5mA, VPP = 80V, Resistance Matching VNN = –80V Large Signal Switch (ON) R ONL 13 22 ohms V SIG = VPP–10V, ISIG = 1A Resistance Switch Off Leakage I SOL 5.0 1.0 10 15 µAV SIG = VPP–10V Per Switch and VNN +10V DC Offset Switch Off 300 100 300 300 mV R L = 100KΩ DC Offset Switch On 500 100 500 500 mV R L = 100KΩ Pos. HV Supply Current I PPQ 10 50 µA ALL SWS OFF Neg. HV Supply Current I NNQ -10 -50 µA ALL SWS OFF Pos. HV Supply Current I PPQ 10 50 µA ALL SWS ON ISW = 5mA Neg. HV Supply Current I NNQ -10 -50 µA ALL SWS ON ISW = 5mA Peak Current Output Switch Frequency f SW 50 KHz Duty Cycle = 50% 6.5 7.0 8.0 V PP = 40V, VNN = –120V IPP Supply Current I PP 4.0 5.0 5.5 mA V PP = 80V, VNN = –80V 4.0 5.0 5.5 V PP = 150V, VNN = –10V 6.5 7.0 8.0 V PP = 40V, VNN = –120V INN Supply Current I NN 4.0 5.0 5.5 mA V PP = 80V, VNN = –80V 4.0 5.0 5.5 V PP = 150V, VNN = –10V Logic Supply I DD 6.0 4.0 6.0 6.0 mA f CLK = 3MHz, Average Current Logic Supply I DDQ 10 10 10 µA Quiescent Current
Electrical Characteristics
DC Characteristics (over recommended operating conditions unless otherwise noted) 0°C +25°C +70°CCharacteristics Sym Units Test Conditionsmin max min typ max min max 50KHz Output Switching Frequency with no load – OBSOLETE –
0°C +25°C +70°C Characteristics Sym min max min typ max min max Units Test Conditions Time to Turn Off VSIG*t SIG(OFF) 200 ns Set Up Time Before LE Rises t SD 150 150 150 ns Time Width of LE t WLE 150 150 150 ns Clock Delay Time to Data Out t DO 300 150 330 350 ns Set Up Time Data to Clock t SU 15 15 8.0 20 ns Hold Time Data from Clock t h 35 35 35 ns Clock Freq f CLK 3.0 3.0 3.0 MHz 50% duty cycle fDATA = fCLK/2 Turn On Time 2.0 2.0 2.0 µsV SIG = VPP -10V, RL = 10KΩ Turn Off Time 3.0 3.0 3.0 µsV SIG = VPP -10V, RL = 10KΩ 10 10 10 V PP = 150V, VNN = -10V Maximum VSIG Slew Rate dv/dt 10 10 10 V/ns V PP = 80V, VNN = -80V 10 10 10 V PP = 40V, VNN = -120V Off Isolation KO -30 -30 -33 -30 dB f = 5MHz, 1KΩ//15pF load -45 -45 -50 -45 dB f = 5MHz, 50Ω load Switch Crosstalk K CR -60 -60 -70 -60 dB f = 5MHz, 50Ω load Output Switch Isolation I ID 300 300 300 mA 300ns pulse width, Diode Current 2.0% duty cycle Off Capacitance SW to GND C SG(OFF) 5.0 17 5.0 12 17 5.0 17 pF 0V, 1MHz On Capacitance SW to GND C SG(ON) 25 50 25 38 50 25 50 pF 0V, 1MHz *Time required for analog signal to turn off before output switch turns off (critical timing). AC Characteristics (over operating conditions VDD = 15V, unless otherwise noted) – OBSOLETE –
VDD Logic power supply voltage1, 3 10.0 V to 15.5 V VPP Positive high voltage supply1, 3 40V to VNN+ 160V VNN Negative high voltage supply1, 3 -10.0V to -120V VIH High-level input voltage V DD -2V to VDD VIL Low-level input voltage 0V to 2.0V VSIG Analog signal voltage peak to peak2 VNN +10V to VPP -10 TA Operating free air-temperature 0 °C to 70°C Notes: 1 Power up/down sequence is arbitrary except GND must be powered-up first and powered-down last. 2V SIG must be VNN ≤ VSIG ≤ VPP or floating during power up/down transistion. 3 Rise and fall times of power supplies VDD, VPP, and VNN should not be less than 1.0msec. +25°C Characteristics Sym min typ max Units Test Conditions +VSPK 1.0 V PP = 40V, VNN = -120V -VSPK 3.5 R L = 50Ω Output Voltage Spike +V SPK 12 V V PP = 80V, VNN = -80V -VSPK 18 R L = 50Ω +VSPK 6.0 V PP = 150V, VNN = -10V -VSPK 9.0 R L = 50Ω
1700 V PP = 80V, VNN = -80V, VSIG = 0V
Charge Injection Q 850 pC V PP = 80V, VNN = -80V, VSIG = 70V
600 V PP = 80V, VNN = -80V, VSIG = -70V
AC Characteristics (over operating conditions VDD = 15V, unless otherwise noted) – OBSOLETE –
VPP –10V RL 10KΩ VOUT Switch OFF Leakage ISOL VPP 15V VNN VPP VNN VDD GND VNN +10 VPP –10 Crosstalk KCR = 20Log VOUT VIN VIN = 10 VP–P @5MHz NC 50Ω VPP 15V VNN VPP VNN VDD GND 50Ω OFF Isolation KO = 20Log VOUT VIN VIN = 10 VP–P @5MHz VPP 15V VNN VPP VNN VDD GND RL VOUT Output Voltage Spike VPP 15V VNN VPP VNN VDD GND VOUT 1KΩ RL 50Ω +VSPK –VSPK Charge Injection +80V +15V –80V VPP VNN VDD GND VSIG VOUT 1000pF Q = 1000pF x ∆VOUT ∆VOUT DC Offset ON/OFF VPP 15V VNN VPP VNN VDD GND VOUT 100KΩ RL Isolation Diode Current IID VPP +15V VNN VPP VNN VDD GND VNN VSIG – OBSOLETE –
D LE SW0 SW1 SW2 SW3 SW4 SW5 SW6 SW7 VNN VPP VDD DOUT CLK DIN
8 BIT
D LE D LE D LE D LE D LE D LE D LE LE DATA IN LE CLOCK DATA OUT OFF ON(TYP) VOUT 50% 50% 50%50% tWLE tSD t SU th 50%50% tOFF 50% tDO tON DN – 1 DN DN + 1 90% 10% Logic Diagram Logic Timing Waveforms – OBSOLETE –
Off Isolation (db) Signal Voltage Frequency (Hz) -20 100K 1M 10M -40 -60 -80 -100 -120 Off Isolation vs Signal Voltage Frequency 100K Crosstalk (db) Analog Signal Frequency (Hz) -50 1M 10M 100M -60 -70 -80 -90 -100 Crosstalk vs Analog Signal Frequency 70 C° 0 C° IDD vs CLK Frequency 10K CLK Frequency (Hz) IDD Current (mA) VDD = 15V, VPP/VNN = ±80V, TA = 0°C to 70°C 100K 1M 10M VDD = 15V, VPP/VNN = ±80V VDD = 15V, VPP/VNN = ±80V Truth Table D0 D1 D2 D3 D4 D5 D6 D7 LE SW0 SW1 SW2 SW3 SW4 SW5 SW6 SW7 LL O F F HL O N LL O F F HL O N LL O F F HL O N LL OFF HL O N LL OFF HL O N LL OFF HL O N LL O F F HL O N LL OFF HL O N X XXX X XXX H HOLD PREVIOUS STATE Notes: 1. The eight switches operate independently. 2. Serial data is clocked in on the L → H transition CLK. 3. The switches go to a state retaining their present condition at the rising edge of LE. When LE is low the shift register data flows through the latch. 4. D OUT is high when switch 7 is on. 5. Shift register clockng has no effect on the switch states if LE is H. Typical Performance Curves – OBSOLETE –
-55 -25 0 25 75 50 Ambient Temp TA (°C) RON (ohms) 40 80 100 120 200 140 Junction Temp T vs Switch Peak Current 0 4.02.51.5 200 175 150 125 100 Switch Peak Current (A) Junction Temp Tj (°C) 400 300 200 100 -100 -200 -300 -4000 -4 3-3 -1 0 ISWITCH (mA) VSWITCH (volts) 0 400200100 HV Output Switching Freq (KHz) IPP/INN Average Current (mA) 100 125 150 VDD = 15V & VPP/VNN = ±80V RON vs VPP /VNN VDD = 15V RON (ohms) @ 5mA 60 160 180V PP -120 -80 -60 -40 40 -20-100 0 20VNN TA = 125°C TA = 75°C TA = 25°C TA = 70°C TA = 0°C TA = -55°C -2 1 4 Switch Current vs Switch Voltage Drop VDD = 15V & VPP/VNN = ±80V IPP/INN vs Output Switching Frequency 300 VSIG Freq = 10KHz & Duty Cycle = 0.1% VDD = 15V & VPP/VNN = ±80V TA = 25°C j TDO vs Ambient Temp TA -50 150 7525 120 110 100 TDO (ns) -25 0 50 100 125 Ambient Temp TA (°C) I = 5mASW ISW = 200mA A °T = 70 C A °T = 25 C A °T = 0 C VDD = 15V & VPP/VNN = ±80V VDD = 15V & VPP/VNN = ±80V TA = 125°C TA = -55°C TA = 75°C TA = 70°C TA = 25°C Typical Performance Curves – OBSOLETE –
Pin Configurations Package Outlines 28-Pin J-Lead Pin Function Pin Function
1 SW3 15 N/C
2 SW3 16 D IN
3 SW2 17 CLK
4 SW2 18 LE
5 N/C 19 D OUT
6 N/C 20 SW7
7 SW1 21 SW7
8 SW1 22 SW6
9 SW0 23 SW6
10 SW0 24 N/C
12 V NN 26 SW5
13 GND 27 SW4
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