HV20720

HV20720 SUTEX | Alldatasheet

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Technical content

Features

❏ HVCMOS® technology for high performance ❏ Operating voltage of up 200V ❏ Very low quiescent current-10 µA ❏ Low parasitic capacitances ❏ Over 20MHz bandwidth ❏ -58dB typical output off isolation at 5MHz ❏ 5.0V CMOS logic circuitry ❏ Excellent noise immunity ❏ Flexible high voltage supplies General Description The Supertex HV207 is an 8-channel high-voltage analog switch integrated circuit (IC) configured as a dual 1 of 4 analog switch. The 2 sets of 4 analog switches are controlled independently with the 2 independent 1:4 decoders. The addressed switches are turned ON and the unaddressed switches are turned OFF . A logic high on the input clear pin will turn OFF all output switches regardless of the address input states. 11/12/01 Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liabi lity to the replacement of devices determined to be defective due to workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to c hange without notice. For the latest product specifications, refer to the Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most curre nt databook or to the Legal/Disclaimer page on the Supertex website.

Characteristics Sym min typ max Units Test Conditions Turn On Time t ON 5.0 µsV SIG = VPP - 10V, RLOAD = 10KΩ Turn Off Time t OFF 5.0 µsV SIG = VPP - 10V, RLOAD = 10KΩ Maximum VSIG Slew Rate dv/dt 13 V/ns Off Isolation KO -45 -58 dB f = 5.0MHz, R LOAD = 50Ω Switch Crosstalk K CR -60 dB f = 5.0MHz, R LOAD = 50Ω Output Switch Isolation I ID 300 mA 300ns pulse width, 2.0% Diode Current duty cycle Characteristics Sym min typ max Units Test Conditions Small Signal Switch (ON) Resistance R ONS 22 27 Ω VSIG = 0V, ISW = 5mA Small Signal Switch (ON)Resistance ∆RONS 5.0 20 % V SIG = 0V, ISW = 5mA Matching Voltage Drop Across SW at ∆VSW 15 V V SIG = +90V, RL = 200Ω Large Positive VSIG Voltage Drop Across SW at ∆VSW 8.0 V V SIG = -90V, RL = 200Ω Large Negative VSIG Switch Off Leakage Per Switch I SOL 1.0 10 µAV SIG = Vpp - 10V and VNN + 10V DC Offset Switch OFF 100 300 mV R L =100KΩ DC Offset Switch ON 100 500 mV R L =100KΩ Pos. HV Supply Current I PPQ 10 50 µA All SWs OFF Neg. HV Supply Current I NNQ -10 -50 µA All SWs OFF Pos. HV Supply Current I PPQ 10 50 µA All SWs ON, I SW = 5 mA Neg. HV Supply Current I NNQ -10 -50 µA All SWs ON, I SW = 5 mA Switch Output Peak Current 3.0 2.0 A V SIG duty cycle ≤0.1% Output Switch Frequency f SW 50 Khz Duty Cycle = 50% IPP Supply Current I PP 3.5 5.0 mA 4 SWs turning ON and OFF at 50KHz. INN Supply Current I NN -3.5 -5 mA Logic Supply Quiescent Current I DDQ 10 µA

Electrical Characteristics

DC Characteristics (VPP = + 100V, VNN = -100V, VDD = + 5.0V, TA = + 25°C) AC Characteristics (VPP = + 100V, VNN = - 100V, VDD = + 5.0V, TA = + 25°C)

A0,A1 SW3A OFF OFF ON TONTOFF 50% 90%10% 50% A1 A0 CLA B1 B0 CLB SW0A SW1A SW2A SW3A SW0B SW1B SW2B SW3B L L L L L L ON OFF OFF OFF ON OFF OFF OFF L H L L H L OFF ON OFF OFF OFF ON OFF OFF H L L H L L OFF OFF ON OFF OFF OFF ON OFF H H L H H L OFF OFF OFF ON OFF OFF OFF ON X X H X X H OFF OFF OFF OFF OFF OFF OFF OFF Symbol Parameter Value VPP - VNN Maximum differential voltage +200V VPP Positive high voltage supply1 +40V to VNN + 200V VNN Negative high voltage supply1 -40V to -160V VDD Logic power supply voltage1 +4.75V to +5.25V VIH High-level input voltage V DD -1.5V to VDD VIL Low-level input voltage 0V to 1.5V VSIG Analog signal voltage peak-to-peak2 VNN +10V to VPP -10V TA Operating free air-temperature 0 °C to 70°C Notes: 1 Power up/down sequence is arbitrary except GND must be powered-up first and powered-down last. SIG must be VNN ≤ VSIG ≤ VPP or floating during power up/down transistion. Operating Conditions Truth Table Logic Timing Waveforms

VPP –10 DC Offset ON/OFF VPP 5V VNN VPP VNN VDD GND VOUT 100KΩ RL TON/TOFF Test Circuit VPP 5V VNN VPP VNN VDD GND VPP –10V RL 10KΩ VOUT Isolation Diode Current IID VPP 5V VNN VPP VNN VDD GND VNN VSIG Crosstalk KCR = 20Log VOUT VIN VIN = 10 VP–P @5MHz NC 50Ω VPP 5V VNN VPP VNN VDD GND 50Ω Charge Injection VPP 5V VNN VPP VNN VDD GND VSIG VOUT 1000pF Q = 1000pF x ∆VOUT ∆VOUT Output Voltage Spike VPP 5V VNN VPP VNN VDD GND VOUT 1KΩ RL 50Ω +VSPK –VSPK OFF Isolation KO = 20Log VOUT VIN VIN = 10 VP–P @5MHz VPP 5V VNN VPP VNN VDD GND RL VOUT Test Circuits

Trans. High Voltage Level Trans. 1:4 Decoder B CLB CLA GND GND VNN VDD VDD 1:4 Decoder A Block Diagram Pin Configuration HV207 28-Pin J-Lead Pin Function Pin Function 1S W 3 A 1 5 B 1 2S W 2 A 1 6 A 0 3S W 2 A 1 7 A 1

4 SW1A 18 CLB

5 SW1A 19 CLA

6 SW0A 20 SW0B

7 SW0A 21 SW0B

8 N/C 22 SW1B

10 N/C 24 SW2B

12 GND 26 SW3B

14 B0 28 SW3A

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TEL: (408) 744-0100 • FAX: (408) 222-4895 www.supertex.com 11/12/01 ©2001 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.