HV20220 SUTEX | Alldatasheet
Document overview
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Technical content
Features
❏ HVCMOS® technology for high performance ❏ Very low quiescent power dissipation – 10 µA ❏ Output On-resistance typically 22 ohms ❏ Low parasitic capacitances ❏ DC to 10MHz analog signal frequency ❏ -60dB typical output off isolation at 5MHz ❏ CMOS logic circuitry for low power ❏ Excellent noise immunity ❏ On-chip shift register, latch and clear logic circuitry ❏ Flexible high voltage supplies ❏ Surface mount package available Package Options General Description This device is a low charge injection 8-channel high-voltage analog switch integrated circuit (IC) intended for use in applica- tions requiring high voltage switching controlled by low voltage control signals, such as ultrasound imaging and printers. Input data is shifted into an 8-bit shift register which can then be retained in an 8-bit latch. To reduce any possible clock feed- through noise, Latch Enable Bar (LE) should be left high until all bits are clocked in. Using HVCMOS technology, this switch combines high voltage bilateral DMOS switches and low power CMOS logic to provide efficient control of high voltage analog signals. The HV203 has the same electrical specifications as the HV202, but it is packaged in the 28 lead plastic chip carrier with the pin configuration of the Supertex HV2216PJ. This IC is suitable for various combinations of high voltage supplies, e.g., V PP/VNN : +50V/–150V, or +100V/–100V. 28-pin 28-lead plastic 48-lead TQFP µ-BGA Die plastic DIP chip carrier Absolute Maximum Ratings* VDD Logic power supply voltage -0.5V to +15V VPP - VNN Supply voltage 220V VPP Positive high voltage supply -0.5V to V NN +200V VNN Negative high voltage supply +0.5V to -200V Logic input voltages -0.5V to V DD +0.3V Analog Signal Range V NN to VPP Peak analog signal current/channel 3.0A Storage temperature -65 °C to +150°C Power dissipation 28-pin PLCC and DIP 1.2W 48 lead TQFP 1.0W * Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. 11/12/01 Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liabi lity to the replacement of devices determined to be defective due to workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to c hange without notice. For the latest product specifications, refer to the Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most curre nt databook or to the Legal/Disclaimer page on the Supertex website.
Electrical Characteristics
DC Characteristics (over recommended operating conditions unless otherwise noted) 30 26 38 48 I SIG = 5mA V PP = 40V, 25 22 27 32 I SIG = 200mA V NN = -160V Small Signal Switch (ON) R ONS 25 22 27 30 ohms I SIG = 5mA V PP = 100V, Resistance 18 18 24 27 I SIG = 200mA V NN = -100V 23 20 25 30 I SIG = 5mA V PP = 160V, 22 16 25 27 I SIG = 200mA V NN = -40V Small Signal Switch (ON) ∆RONS 20 5.0 20 20 % I SW = 5mA, VPP = 100V, Resistance Matching VNN = -100V Large Signal Switch (ON) R ONL 15 ohms V SIG = VPP - 10V, ISIG = 1A Resistance Switch Off Leakage I SOL 5.0 1.0 10 15 µAV SIG = VPP - 10V Per Switch and VNN +10V DC Offset Switch Off 300 100 300 300 mV R L = 100KΩ DC Offset Switch On 500 100 500 500 mV R L = 100KΩ Pos. HV Supply Current I PPQ 10 50 µA ALL SWs OFF Neg. HV Supply Current I NNQ -10 -50 µA ALL SWs OFF Pos. HV Supply Current I PPQ 10 50 µA ALL SWs ON I SW = 5mA Neg. HV Supply Current I NNQ -10 -50 µA ALL SWs ON I SW = 5mA Peak Current Output Switch Frequency f SW 50 KHz Duty Cycle = 50% 6.5 7.0 8.0 V PP = 40V, VNN = -160V IPP Supply Current I PP 4.0 5.0 5.5 mA V PP = 100V, VNN = -100V 4.0 5.0 5.5 V PP = 160V, VNN = -40V 6.5 7.0 8.0 V PP = 40V, VNN = -160V INN Supply Current I NN 4.0 5.0 5.5 mA V PP = 100V, VNN = -100V 4.0 5.0 5.5 V PP = 160V, VNN = -40V Logic Supply I DD 4.0 4.0 4.0 mA f CLK = 5MHz, VDD = 5.0V Average Current Logic Supply I DDQ 10 10 10 µA Quiescent Current Logic Input Capacitance C IN 10 10 10 pF 0°C +25 °C +70 °CCharacteristics Sym Units Test Conditionsmin max min typ max min max 50KHz Output Switching Frequency with no load HV20220/HV20320
AC Characteristics (over operating conditions VDD = 5V, unless otherwise noted) 0°C +25 °C +70 °C Characteristics Sym min max min typ max min max Units Test Conditions Set Up Time Before LE Rises t SD 150 150 150 ns Time Width of LE t WLE 150 150 150 ns Clock Delay Time to Data Out t DO 150 150 150 ns Time Width of CL t WCL 150 150 150 ns Set Up Time Data to Clock t SU 15 15 8.0 20 ns Hold Time Data from Clock t h 35 35 35 ns Clock Freq f CLK 5.0 5.0 5.0 MHz 50% duty cycle fDATA = fCLK/2 Clock Rise and Fall Times t r, tf 50 50 50 ns Turn On Time t ON 5.0 5.0 5.0 µsV SIG = VPP -10V, RL = 10KΩ Turn Off Time t OFF 5.0 5.0 5.0 µsV SIG = VPP -10V, RL = 10KΩ 20 20 20 V PP = 160V, VNN = -40V Maximum VSIG Slew Rate dv/dt 20 20 20 V/ns V PP = 100V, VNN = -100V 20 20 20 V PP = 40V, VNN = -160V Off Isolation KO -30 -30 -33 -30 dB f = 5MHz, 1KΩ//15pF load -58 -58 -58 dB f = 5MHz, 50Ω load Switch Crosstalk K CR -60 -60 -70 -60 dB f = 5MHz, 50Ω load Output Switch Isolation I ID 300 300 300 mA 300ns pulse width, Diode Current 2.0% duty cycle Off Capacitance SW to GND C SG(OFF) 5.0 17 5.0 12 17 5.0 17 pF 0V, 1MHz On Capacitance SW to GND C SG(ON) 25 50 25 38 50 25 50 pF 0V, 1MHz HV20220/HV20320
AC Characteristics (over operating conditions VDD = 5V, unless otherwise noted) Symbol Parameter Value VDD Logic power supply voltage1, 3 4.5V to 13.2V VPP Positive high voltage supply1, 3 40V to VNN+ 200V VNN Negative high voltage supply1, 3 -40V to -160V VIH High-level input voltage V DD -1.5V to VDD VIL Low-level input voltage 0V to 1.5V VSIG Analog signal voltage peak to peak V NN +10V to VPP -10V2 TA Operating free air-temperature 0 °C to 70°C Notes: 1 Power up/down sequence is arbitrary except GND must be powered-up first and powered-down last. SIG must be V NN ≤ VSIG ≤ VPP or floating during power up/down transistion. 3 Rise and fall times of power supplies V DD, VPP, and VNN should not be less than 1.0msec. Operating Conditions* +25°C UnitsCharacteristics Sym Test Conditions min typ max Output Voltage Spike +V SPK 150 VPP = 40V, VNN = -160V, RL = 50Ω– VSPK +VSPK VPP = 100V, VNN = -100V, RL = 50Ω– VSPK mV +VSPK VPP = 160V, VNN = -40V, RL = 50Ω– VSPK Charge Injection 820 V PP = 40V, VNN = -160V, VSIG = 0V Q 600 pC V PP = 40V, VNN = -160V, VSIG = 0V
350 V PP = 40V, VNN = -160V, VSIG = 0V
VPP –10 DC Offset ON/OFF VPP 5V VNN VPP VNN VDD GND VOUT 100KΩ RL TON/TOFF Test Circuit VPP 5V VNN VPP VNN VDD GND VPP –10V RL 10KΩ VOUT Isolation Diode Current IID VPP 5V VNN VPP VNN VDD GND VNN VSIG Crosstalk KCR = 20Log VOUT VIN VIN = 10 VP–P @5MHz NC 50Ω VPP 5V VNN VPP VNN VDD GND 50Ω Charge Injection VPP 5V VNN VPP VNN VDD GND VSIG VOUT 1000pF Q = 1000pF x ∆VOUT ∆VOUT Output Voltage Spike VPP 5V VNN VPP VNN VDD GND VOUT 1KΩ RL 50Ω +VSPK –VSPK OFF Isolation KO = 20Log VOUT VIN VIN = 10 VP–P @5MHz VPP 5V VNN VPP VNN VDD GND RL VOUT Test Circuits HV20220/HV20320
(TYP) V 50% 50% 50%50% t WLE t SD t SU t h 50%50% t OFF 50% t DO t ON t WCL CLR D N – 1 D N D N + 1 50%50% 90% 10% Logic Timing Waveforms Logic Diagram D LE SW0 SW1 SW2 SW3 SW4 SW5 SW6 SW7 VNN VPP CLVDD DOUT CLK DIN
8 BIT
D LE D LE D LE D LE D LE D LE D LE LE HV20220/HV20320
Notes: 1. The eight switches operate independently. 2. Serial data is clocked in on the L → H transition CLK. 3. The switches go to a state retaining their present condition at the rising edge of LE. When LE is low the shift register data flows through the latch. 4. D OUT is high when switch 7 is on. 5. Shift register clocking has no effect on the switch states if LE is H. 6. The clear input overrides all other inputs. D0 D1 D2 D3 D4 D5 D6 D7 LE CL SW0 SW1 SW2 SW3 SW4 SW5 SW6 SW7 L L L OFF HL L O N L L L OFF HL L O N L L L OFF HL L O N L L L OFF HL L O N L L L OFF HL L O N L L L OFF HL L O N L L L OFF HL L O N L L L OFF HLL O N X X X X X X X X H L HOLD PREVIOUS STATE X X X X X X X X X H OFF OFF OFF OFF OFF OFF OFF OFF Truth Table HV20220/HV20320
Typical Performance Curves HV20220/HV20320 CLK Frequency (KHz) TDO vs. Ambient Temperature TA Ambient Temp TA (°C) TDO (ns) RON (ohms) Ambient Temperature (°C) RON (ohms) @5mA Off-Isolation vs. Signal Voltage Frequency VDD = 5.0V, VPP/VNN = ±100V Off-Isolation (dB) -80.0 -75.0 -70.0 -65.0 -60.0 -55.0 -50.0 1.0 10.0 RON vs. Ambient Temperature TA VDD = 5.0V, VPP/VNN = ±100V RON vs. VPP/VNN VPP/VNN = ±100V IPP/INN vs. Output Switching Frequency IPP/INN Average Current (mA) Output Switching Frequency (KHz) VDD = 5.0V VDD = 5.0V, VPP/VNN = ±100V IDD CURRENT (mA) IDD vs Clock Frequency VDD = 5.0V, VPP/VNN = ±100V, TA = 0°C to 70°C 3.0 2.0 1.0 0.0 10 1000 10000 100 Signal Voltage Frequency (MHz) VPP VNN TA = 0°C TA = 25°C TA = 70°C TA = 125°C TA = 70°C TA = 0°C -50 -25 0 25 50 75 100 125 150 10.0 20.0 30.0 40.0 ISW = 5mA ISW = 200mA 40V 60V 80V 100V 120V 140V 160V 10.0 20.0 30.0 40.0 50.0 -160V -140V -120V -100V -80V -60V -40V TA = 125°C TA = 85°C TA = 25°C TA = 0°C -50 -25 0 25 50 75 100 125 100 VDD = 5.0V VDD = 13.5V 0 25 50 75 100 125 150
Pin Configurations Package Outlines HV203 28 Pin J-Lead Pin Function Pin Function
1 SW3 15 N/C
2 SW3 16 D
3 SW2 17 CLK
4 SW2 18 LE
5 SW1 19 CL
6 SW1 20 D
7 SW0 21 SW7
8 SW0 22 SW7
10 V NN 24 SW6
11 N/C 25 SW5
12 GND 26 SW5
14 N/C 28 SW4
9 N/C 23 SW6
13 GND 27 SW4
HV202, HV203 25 19 top view 28-pin J-Lead Package 24 23 22 21 20 5 116789 1 0 HV20220/HV20320
1 SW5
2 N/C
3 SW4
4 N/C
5 SW4
6 N/C
7 N/C
8 SW3
9 N/C
10 SW3
11 N/C
12 SW2
13 N/C
14 SW2
15 N/C
16 SW1
17 N/C
18 SW1
19 N/C
20 SW0
21 N/C
22 SW0
23 N/C
26 N/C
27 N/C
28 GND
30 N/C
31 N/C
32 N/C
34 CLK
36 CLR
38 N/C
39 SW7
40 N/C
41 SW7
42 N/C
43 SW6
44 N/C
45 SW6
46 N/C
47 SW5
48 N/C
Pin Configurations Package Outlines Pin #1 Pin 1 top view 48-pin TQFP Pin 12 HV202 HV20220/HV20320
0.375 0.75 DATUM AXIS 'X' DATUM AXIS 'Y' 5.7 ± 0.05 2.85 5 ± 0.05 2.5 A B C D E F A B C D E F DIE 4.65 LOT # DIE 4.09 1 2 34567 A1 CORNER INDEX7 6 54321 SI HV20220GA AAAAAAA NOTES: 1. Dimensioning and tolerance per ASME Y14.5M-1994. 2. Do not subject part to ultrasonic cleaning or intense UV. 3. Contact ball position per JESD 95-1, SPP-010. 4. Units are in millimeters. BUMP VIEW BACK VIEW 0.75 Polyimide Tape Adhesive Elastomer Seal
4 Sides/Edges
0.243 ± 0.03 0.99 ± 0.05 0.05 0.323 ± 0.03 ENLARGED VIEW HV20220/HV20320
µ-BGA Function Table Ball Location Function A3 SW1 B2 SW2 B3 SW1 B4 SW0 B5 SW0 B6 V NN C1 SW3 C2 SW3 C3 SW2 C4 V PP C5 GND C6 D IN C7 V DD D1 SW4 D2 SW4 D3 SW5 D4 SW7 D5 LE D6 CLK E2 SW5 E3 SW6 E4 SW7 E5 D OUT E6 CLR F3 SW6 HV20220/HV20320
1235 Bordeaux Drive, Sunnyvale, CA 94089
TEL: (408) 744-0100 • FAX: (408) 222-4895 www.supertex.com 11/12/01 ©2001 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.