FU008-A-C-SD

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AUTOMOTIVE, 125°C OPERATION, 2-WIRE TIMER WITH BUILT-IN QUARTZ CRYSTALwww.ablic.com © ABLIC Inc., 2017-2020 Rev.2.1_00 The convenience timer is a CMOS timer IC which operates wit h low current consumption, a nd is suitable for the time management of the relative time. The S-35710M compares the timer value and the value written to the internal register and outputs an interrupt signal when the values match each other. The timer of the S-35710M is a 24-bit binary-up counter. The internal register data can be set freely by users via a 2-wire serial interface. Consequently, the time before the occurrence of an interrupt signal can be set freely. Since the S-35710M has a built-in quartz crystal, a matching a ssessment of the IC and the quar tz crystal is unnecessary. Moreover, the number of external parts can also be reduced. Caution This product can be used in vehicle equipment and in-vehicle equipment. Before using the product for these purposes, it is imperative to contact our sales representatives.  Features

• Built-in 32.768 kHz quartz crystal
• Alarm interrupt function: Settable on the second time scale from 1 second to 194 days (Approximately half a year)
• Low current consumption: 0.25 μA typ. (VDD = 3.0 V, Ta = +25°C)
• Wide range of operation voltage: 1.8 V to 5.5 V
• 2-wire (I 2C-bus) CPU interface
• Operation temperature range: Ta = −40°C to +125°C
• Lead-free (Sn 100%), halogen-free
• AEC-Q100/Q200 qualified *1 *1. Contact our sales representatives for details.  Application
• Time management of variou s systems during the sleep period  Package
• HSOP-8Q

CONVENIENCE TIMER AUTOMOTIVE, 125°C OPERATION, 2-WIRE TIMER WITH BUILT-IN QUARTZ CRYSTAL S-35710M A Series Rev.2.1_00  Block Diagram RST SDA SCL VDD VSS INT Oscillation circuit 32.768 kHz Quartz crystal Divider, Timing generator Pull-up Power-on detection circuit Constant voltage circuit Chattering elimination circuit Internal reset signal INT pin controller Wake-up time register Comparator Timer (24-bit) Time register Serial interface Figure 1

CONVENIENCE TIMER AUTOMOTIVE, 125°C OPERATION, 2-WIRE TIMER WITH BUILT-IN QUARTZ CRYSTAL Rev.2.1_00 S-35710M A Series  AEC-Q100/Q200 Qualified This IC supports AEC-Q100/Q200 for operation temperature grade 1. Contact our sales representatives for details of AEC-Q100/Q200 reliability specification.  Product Name Structure 1. Product name S-35710M 01 A - E8T3 U Environmental code U: Lead-free (Sn 100%), halogen-free Product name Operation temperature A: Ta = −40°C to +125°C Package abbreviation and IC packing specification*1 E8T3: HSOP-8Q, Ta pe Option code *1. Refer to the tape drawing. 2. Package Table 1 Package Drawing Codes Package Name Dimension Tape Reel Land HSOP-8Q FU008-A-P-SD FU008-A-C-SD FU008-A-R-SD FU008-A-L-SD

CONVENIENCE TIMER AUTOMOTIVE, 125°C OPERATION, 2-WIRE TIMER WITH BUILT-IN QUARTZ CRYSTAL S-35710M A Series Rev.2.1_00  Pin Configuration 1. HSOP-8Q Bottom view Top view Figure 2 Table 2 List of Pins Pin No. Symbol Description I/O Configuration

1 SCL Input pin for

serial clock Input CMOS input

2 VDD Pin for positive

power supply − −

3 RST

reset signal Input CMOS input (With pull-up resistor)

4 NC *2 No connection − −

5 NC*2 No connection − −

6 VSS GND pin − −

7 INT Output pin for

interrupt signal Output CMOS output

8 SDA I/O pin for serial

data Bi-directional Nch open-drain output, CMOS input *1. Connect the heat sink of backside at shadowed ar ea to the board, and set electric potential GND. However, do not use it as the function of electrode. *2. The NC pin is electrically open. Therefore, leave it open or connect it to the VDD pin or the VSS pin. Caution Do not place a wiring on the backside of the package.

CONVENIENCE TIMER AUTOMOTIVE, 125°C OPERATION, 2-WIRE TIMER WITH BUILT-IN QUARTZ CRYSTAL Rev.2.1_00 S-35710M A Series  Pin Functions 1. SDA (I/O for serial data) pin This is a data input / output pin for I 2C-bus interface. The SDA pin inputs / outputs data by synchronizing with a clock pulse from the SCL pin. This pin has CMOS input and Nch open-drain output. Gener ally in use, the SDA pin is pulled up to VDD potential via a resistor, and is used with wired-OR c onnection of other device of Nch open-drain output or open collector output. 2. SCL (Input for serial clock) pin This is a clock input pin for I2C-bus interface. The SDA pin inputs / outputs data by synchronizing with this clock pulse. 3. RST (Input for reset signal) pin This pin inputs the reset signal. The timer is reset when inputting "L" to the RST pin, and the timer starts the operation when inputting "H". The RST pin has a built-in chattering elimination circuit. Regarding the chatterging elimination circuit, refer to " RST Pin ". Besides, the RST pin has a pull-up resistor. 4. INT (Output for interrupt signal) pin This pin outputs an interrupt signal. The interrupt signal is output when the time written to the wake-up time register comes. Regarding the operation of the interrupt signal output, refer to " INT Pin Interrupt Signal Output". Besides, the INT pin output form is CMOS output. 5. VDD (Positive power supply) pin Connect this pin with a positive power supply. Regard ing the values of voltage to be applied, refer to " Recommended Operation Conditions". 6. VSS pin Connect this pin to GND.

CONVENIENCE TIMER AUTOMOTIVE, 125°C OPERATION, 2-WIRE TIMER WITH BUILT-IN QUARTZ CRYSTAL Rev.2.1_00 S-35710M A Series  Absolute Maximum Ratings Table 3 Item Symbol Applied Pin Absolute Maximum Rating Unit Power supply voltage V DD − V SS − 0.3 to VSS + 6.5 V Input voltage V IN SDA, SCL VSS − 0.3 to VSS + 6.5 V RST VSS − 0.3 to VDD + 0.3 ≤ VSS + 6.5 V Output voltage V OUT SDA VSS − 0.3 to VSS + 6.5 V INT VSS − 0.3 to VDD + 0.3 ≤ VSS + 6.5 V Operation ambient temperature*1 T opr − −40 to +125 °C Storage temperature T stg − −55 to +125 °C *1. Conditions with no condensation or fros t. Condensation or frost causes short- circuiting between pins, resulting in a malfunction. Caution The absolute maximum rati ngs are rated values exceeding whic h the product could suffer physical damage. These values must therefore not be exceeded under any conditions.  Recommended Operation Conditions Table 4 (VSS = 0 V) Item Symbol Condition Min. Typ. Max. Unit Operation power supply voltage V DD Ta = −40°C to +125°C 1.8 − 5.5 V  Oscillation Characteristics Table 5 (Ta = +25°C, VDD = 3.0 V, VSS = 0 V unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Oscillation start voltage V STA Within 10 seconds 1.8 − 5.5 V Oscillation start time t STA − − − 1 s Frequency deviation Δf/f Ta = −40°C to +125°C −1 − +1 %

CONVENIENCE TIMER AUTOMOTIVE, 125°C OPERATION, 2-WIRE TIMER WITH BUILT-IN QUARTZ CRYSTAL S-35710M A Series Rev.2.1_00  DC Electrical Characteristics Table 6 (Ta = −40°C to +125°C, VSS = 0 V unless otherwise specified) Item Symbol Applied Pin Condition Min. Typ. Max. Unit Current consumption 1 IDD1 − VDD = 3.0 V, Ta = −40°C to +85°C, Out of communication, RST pin = VDD, INT pin = no load − 0.25 0.5 μA VDD = 3.0 V, Ta = +125°C, Out of communication, RST pin = VDD, INT pin = no load − 0.75 1.2 μA Current consumption 2 IDD2 − VDD = 3.0 V, fSCL = 1 MHz, During communication, RST pin = VDD, INT pin = no load − 170 300 μA High level input leakage current IIZH SDA, SCL, RST V IN = VDD −0.5 − 0.5 μA Low level input leakage current IIZL SDA, SCL V IN = VSS −0.5 − 0.5 μA High level output leakage current IOZH SDA V OUT = VDD −0.5 − 0.5 μA Low level output leakage current IOZL SDA V OUT = VSS −0.5 − 0.5 μA High level input voltage VIH SDA, SCL, RST − 0.7 × VDD − V SS + 5.5 V Low level input voltage VIL SDA, SCL, RST − V SS − 0.3 − 0.3 × VDD V High level output voltage VOH INT I OH = −0.4 mA 0.8 × VDD − − V Low level output voltage VOL SDA, INT I OL = 2.0 mA − − 0.4 V Low level input current IIL RST VDD = 3.0 V, VIN = VSS −100 −30 −5 μA

CONVENIENCE TIMER AUTOMOTIVE, 125°C OPERATION, 2-WIRE TIMER WITH BUILT-IN QUARTZ CRYSTAL Rev.2.1_00 S-35710M A Series  AC Electrical Characteristics Table 7 Measurement Conditions 0.8 × VDD Input pulse voltage Output reference voltage 0.2 × VDD 0.7 × VDD 0.3 × VDD Figure 7 Input / Output Waveform during AC Measurement Input pulse voltage VIH = 0.8 × VDD, VIL = 0.2 × VDD Input pulse rise / fall time 20 ns Output reference voltage VOH = 0.7 × VDD, VOL = 0.3 × VDD Output load 100 pF Table 8 AC Electrical Characteristics (Ta = −40°C to +125°C) SCL clock frequency f SCL 0 400 0 1000 kHz SCL clock "L" time t LOW 1.3 − 0.4 − μs SCL clock "H" time t HIGH 0.6 − 0.3 − μs SDA output delay time*1 t AA − 0.9 − 0.5 μs Start condition set-up time t SU.STA 0.6 − 0.25 − μs Start condition hold time t HD.STA 0.6 − 0.25 − μs Data input set-up time t SU.DAT 100 − 80 − ns Data input hold time t HD.DAT 0 − 0 − ns Stop condition set-up time t SU.STO 0.6 − 0.25 − μs SCL, SDA rise time t R − 0.3 − 0.3 μs SCL, SDA fall time t F − 0.3 − 0.3 μs Bus release time t BUF 1.3 − 0.5 − μs Noise suppression time t l − 50 − 50 ns *1. Since the output form of the SDA pin is Nch open-drain output, the SDA output delay time is determined by the values of the load resistance and load capacitance outside the IC. Figure 9 shows the relationship between the output load values.

CONVENIENCE TIMER AUTOMOTIVE, 125°C OPERATION, 2-WIRE TIMER WITH BUILT-IN QUARTZ CRYSTAL S-35710M A Series Rev.2.1_00 Timing status INT pin = "L" Timing stop status INT pin = "L" Timing status INT pin = "L" Timing stop status INT pin = "H" Initial status Wake-up time register = "0 h" Timer = "0 h" INT pin = "L" Timer reset Timer = "0 h" INT pin = "L" Read mode Write Write Write Read Read Read Power-on RST pin = "L" RST pin = "H" Count up every second RST pin = "L" RST pin = "L" RST pin = "L" Write Read Timer = "FFFFFF h" Timer = Wake-up time register Automatic migration Count up every second Timer reset Wake-up time register = "0 h" Timer = "0 h" INT pin = "H" Write mode RST pin = "H" Read Write RST pin = "L" Remark Write: Wake-up time register write command Read: Time register read command Write Figure 12 Status Transition Diagram for S-35710M

CONVENIENCE TIMER AUTOMOTIVE, 125°C OPERATION, 2-WIRE TIMER WITH BUILT-IN QUARTZ CRYSTAL Rev.2.1_00 S-35710M A Series 4. Data transmission format After the start condition transmission, the 1st byte is a slave address and a co mmand (read / write bit) that shows the transmission direction of the data at the 2nd byte or subsequent bytes. The slave address of the S-35710M is specified to "0110010 ". The data can be written to the wake-up time register when read / write bit is "0", and the data of the wake-up time register or the time register can be read when read / write bit is "1". When the data can be written to the wake-up time register, input the data from the master device in order of B7 to B0. The acknowledge ("L") is output from the S-35710M whenever a 1-byte data is input. When the data of the wake-up time regist er or the time register can be read, the data from the S-35710M is output in order of B7 to B0 in byte unit. Input the acknowledge (" L") from the master device whenever a 1-byte data is input. However, do not input the acknowledge for the last data byte (NO_ACK). By this, the end of the data read is informed. After the master device receives / transmits the acknowle dge for the last data byte, input the stop condition to the S-35710M to finish the access operation. When the master device inputs start c ondition without inputting stop condition at this time, the S-35710M becomes restart condition, and can transmit / re ceive the data continuously if the ma ster device inputs the slave address continuously. A : Master device input data : S-35710M output data Slave address Slave address Slave address Data Data Data DataA A A A0 B7 B1 B7 B0 B7 B0 B7 B0 B7 B0 SP ST A Data Data DataA A A 1 B7 B0 B7 B0 B7 B0 A Data Data Data DataA A A A0 B7 B0 B7 B0 B7 B0 B7 B0 ASlave address Data Data DataA A A 1 B7 B1 R/W B7 B0 B7 B0 B7 B0 SP ST ST ST B7 B1 B7 B1 SP A : Start condition : Acknowledge A A : Stop condition ST SP R/W R/W R/W 1 9 18 27 36 45 Data write format Data read format Restart format SCL SDA SDA SDA Figure 17 Data Transmission Format of Serial Interface

CONVENIENCE TIMER AUTOMOTIVE, 125°C OPERATION, 2-WIRE TIMER WITH BUILT-IN QUARTZ CRYSTAL Rev.2.1_00 S-35710M A Series 7. Read operation of wake-up time register Perform the read operation of the wake-u p time register with the restart format. Regarding the restart format, refer to "4. Data transmission format ". When performing the read operation of the wake-up time register, set the RST pin to "H". If the RST pin is set to "L", the time register data is read. Transmit the start condition and the slave address from the master device. The slav e address of the S-35710M is specified to "0110010". Next, transmit "0" to the read / write bit. B7 in the 2nd byte is an address pointer. Set B7 to "0" w hen reading the wake-up time register. Next, transmit the dummy data to B6 to B1. Make sure to set B0 to "1" since it is a test bit. This processing is called "dummy write". Then transmit the start condition, the slave address and the read / write bit. The data of the wake-up time register can be read when the read / write bit is set to "1". Consequently, the data of the wake-up time register is output from the S-35710M. Each byte from B7 is transmitted. When the read operation of the wake-up time register is finished, transmit "1" (NO_ACK) to the acknowledge after B0 output from the master device, and then transmit the stop condition. The wake-up time register is a 3-byte register. "1" is read if the read operation is performed continuously after reading 3 bytes of the wake-up time register. Regarding the wake-up time register, refer to " Configuration of Registers". Moreover, the internal address pointer is reset if recognizi ng the stop condition. Therefor e, do not transmit the stop condition after dummy write operation. T he time register is read if performing t he read operation of the register after transmitting the stop condition. 19 1 81 9 18 27 36 SCL ACK ACK START ACK ACK NO_ACK STOP WU23 WU22 WU21 WU20 WU19 WU18 WU17 WU16 0100110 B1B7 B0B7 B0 B7 B0 B7 WU15 WU14 WU13 WU12 WU11 WU10 WU9 WU8 WU7 WU6 WU5 WU4 WU3 WU2 WU1 WU0 SDA Wake-up time register (3-byte) B0B7 Dummy data Dummy write Slave address (0110010) ACK START 0100110 B1R/W R/W B7 Slave address (0110010) Make sure to set B0 to "1" since it is a test bit. Input NO_ACKafter the 3rd byte transmission. Set B7 as an address pointer. *1. Set B6 to B1 to "0" or "1" since they are dummy data. : S-35710M output data : Master device input data Figure 20 Read Timing of Wake-up Time Register

CONVENIENCE TIMER AUTOMOTIVE, 125°C OPERATION, 2-WIRE TIMER WITH BUILT-IN QUARTZ CRYSTAL S-35710M A Series Rev.2.1_00  Release of SDA The RST pin of the S-35710M does not perform the reset oper ation of the communication in terface. Therefore, the stop condition is input to reset the internal interface circuit usually. However, the S-35710M does not accept the stop condition from the master device when in the status that SDA outputs "L" (at the time of acknowledge outputting or reading). Consequently, it is necessary to finish the acknowledge output or read operation. Figure 21 shows the SDA release method. First, input the start condition from t he master device (since SDA of the S- 35710M outputs "L", the S-35710M can not detect the start condition). Next, input the clocks for 1-byte data access (9 clocks) from SCL. During the time, release SDA of the master device. By this, the SDA input / output before communication interrupt is completed, and SDA of the S-35710M becomes release status. Contin uously, if the stop condition is input, the internal circuit resets and the communication returns to normal status. It is strongly recommended that the SDA release method is performed at the time of system initialization after the power supply voltage of the master device is raised. 1 2 8 9 SCL SDA (S-35710M output) "L" or High-Z "L" High-Z "L" or High-Z Start condition Clocks for 1-byte data access Stop condition SDA (Master device output) "L" SDA Figure 21 SDA Release Method

CONVENIENCE TIMER AUTOMOTIVE, 125°C OPERATION, 2-WIRE TIMER WITH BUILT-IN QUARTZ CRYSTAL Rev.2.1_00 S-35710M A Series  Power-on Detection Circuit In order for the power-on detection circuit to operate normally, raise the power supply voltage of the IC from 0.2 V or lower so that it reaches 1.8 V of the operation power supply voltage minimum value within 10 ms, as shown in Figure 22. Within 10 ms 1.8 V (Operation power supply voltage min.)

0 V*1

0.2 V or lower

*1. 0 V means that there is no potential difference between the VDD pin and the VSS pin of the S-35710M. Figure 22 How to Raise Power Supply Voltage If the power supply voltage of the S-35710M cannot be raised under the above conditions, the power-on detection circuit may not operate normally and an oscillation may not start. In such case, perform the operations shown in " 1. When power supply voltage is raised at RST pin = "L" " and "2. When power supply voltage is raised at RST pin = "H" ". 1. When power supply voltage is raised at RST pin = "L" Set the RST pin to "L" until the power supply voltage reaches 1.8 V or higher. While the RST pin is set to "L", the oscillation start signal becomes "H", and the crystal oscillation circuit normally oscillates. If the RST pin is set to "H" after the power supply voltage reaches 1.8 V, the o scillation start signal becomes "L" within 500 ms, and the oscillation status is maintained. The current consumption increases by 30 μA typ. while the RST pin is set to "L". 1.8 V (Operation power supply voltage min.) *1. 0 V means that there is no potential difference between the VDD pin and the VSS pin of the S-35710M. Figure 23 When Power Supply Voltage is Raised at RST Pin = "L"

CONVENIENCE TIMER AUTOMOTIVE, 125°C OPERATION, 2-WIRE TIMER WITH BUILT-IN QUARTZ CRYSTAL S-35710M A Series Rev.2.1_00 2. When power supply voltage is raised at RST pin = "H" Set the RST pin to "L" after the power supply voltage reaches 1.8 V or higher. If the RST pin is set to "L" for 500 ms or longer, the oscillation start signal becomes "H", and the crystal oscillation circuit normally oscillates. After that, if the RST pin is set to "H", the oscillation start signal becomes "L " within 500 ms, and the oscillation status is maintained. The current consumption increases by 30 μA typ. while the RST pin is set to "L". 10 ms 0V *1 1.8 V (Operation power supply voltage min.) *1. 0 V means that there is no potential difference between the VDD pin and the VSS pin of the S-35710M. Figure 24 When Power Supply Voltage is Raised at RST Pin = "H" The RST pin has a built-in chattering elim ination circuit. To determine the RST pin "H" input, perform communication subsequent to setting the interval of 3.5 periods (0 .438 seconds) of clock (8 Hz) or longer after the RST pin changes from "L" to "H". Regarding the chattering elimination of the RST pin, refer to "  RST Pin ".

CONVENIENCE TIMER AUTOMOTIVE, 125°C OPERATION, 2-WIRE TIMER WITH BUILT-IN QUARTZ CRYSTAL S-35710M A Series Rev.2.1_00  Example of Application Circuit Figure 27 Caution 1. Start communication under stable c ondition after turnig on the system power supply. 2. The above connection diagrams do not guarantee operation. Set the constants after performing sufficient evaluation usin g the actual application.

CONVENIENCE TIMER AUTOMOTIVE, 125°C OPERATION, 2-WIRE TIMER WITH BUILT-IN QUARTZ CRYSTAL Rev.2.1_00 S-35710M A Series  Precautions

• Do not apply excessive impact or vibration since this IC has a built-in quartz crystal. Also, do not locate a device which generates high level of electronic noise near this IC.
• Depending on the device, the usage condition and other reasons, the built-in quartz crystal may be damaged due to the impact or vibration at the time of board splitting and mounting. Perfo rm thorough evaluatio n with the actual application.
• The built-in quartz crystal may be damaged due to the reso nance when executing the ultrasonic cleaning. Therefore, the operation of the IC is not guaranteed if the ultrasonic cleaning is executed.
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic protection circuit.
• ABLIC Inc. claims no responsibility for any disputes arising out of or in connection with any infringement by products including this IC of patents owned by a third party.

CONVENIENCE TIMER AUTOMOTIVE, 125°C OPERATION, 2-WIRE TIMER WITH BUILT-IN QUARTZ CRYSTAL S-35710M A Series Rev.2.1_00  Characteristics (Typical Data) 1. Current consumption 1 vs. Power supply voltage characteristics 2. Current consumption 2 vs. SCL frequency characteristics Ta = +25°C Ta = +25°C 1.0 0.8 0.6 0.4 0.2 420 IDD1 [μA] VDD [V] 1500 600 10005000 IDD2 [μA] SCL frequency [kHz] 300 200 100 400 500 VDD = 5.0 V VDD = 3.0 V 3. Current consumption 1 vs. Temperature characteristics 4. Oscillation frequency vs. Power supply voltage characteristics Ta = +25°C −10 420 Δf/f [ppm] VDD [V] 5. Oscillation frequency vs. Temperature characteristics 6. Low level output current vs. Output voltage characteristics INT pin, SDA pin, Ta = +25°C −40 −25 0 25 50 75 100 125 −450 −50 −150 −250 −350 Δf/f [ppm] Ta [°C] −100 −200 −300 −400 420 IOL [mA] VOUT [V] VDD = 5.0 V VDD = 3.0 V 7. High level output current vs. V DD − VOUT characteristics 8. Low level input current vs. Power supply voltage characteristics INT pin, Ta = +25°C RST pin, Ta = +25°C −25 420 IOH [mA] VDD − VOUT [V] −10 −15 −20 VDD = 3.0 V VDD = 5.0 V −60 420 IIL [μA] −30 −40 −50 −20 −10 VDD [V]

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Disclaimers (Handling Precautions) 1. All the information described herein (product data, specific ations, figures, tables, programs, algorithms and application circuit examples, et c.) is current as of publishing date of this document and is subject to change without notice. 2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of any specific mass-production design. ABLIC Inc. is not liable for any losses, damages, claims or dem ands caused by the reasons other than the products described herein (hereinafter "the products") or infringement o f third-party intellectual property right and any other right due to the use of the information described herein. 3. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information described herein. 4. Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute maximum ratings, operation voltage range and electrical characteristics, etc. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due to the use of the products outside their specified ranges. 5. Before using the products, co nfirm their applications, and the laws and regulations of the region or country where they are used and verify suitability, safety and other factors for the intended use. 6. When exporting the products, comply with the Foreign Exchang e and Foreign Trade Act and all other export-related laws, and follow the required procedures. 7. The products are strictly prohibited from using, providing o r exporting for the purposes of the development of weapons of mass destruction or military use. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by any provision or export to the person or entity who i ntends to develop, manufacture, use or store nuclear, biological or chemical weapons or missiles, or use any other military purposes. 8. The products are not designed to be used as part of any devi ce or equipment that may affect the human body, human life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment, aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses by ABLIC, Inc. Do not apply the products to the above listed devices and equipments. ABLIC Inc. is not liable for any losses, damages, claims or dem ands caused by unauthorized or unspecified use of the products. 9. In general, semiconductor products may fail or malfunction w ith some probability. The user of the products should therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread prevention measures, and malfunction prevention to prevent acci dents causing injury or death, fires and social damage, etc. that may ensue from the products' failure or malfunction. The entire system in which the products are used must be sufficiently evaluated and judged whether the products are allowed to apply for the system on customer's own responsibility. 10. The products are not designed to be radiation-proof. The ne cessary radiation measures should be taken in the product design by the customer depending on the intended use. 11. The products do not affect human health under normal use. H owever, they contain chemical substances and heavy metals and should therefore not be put in the mouth. The fractu re surfaces of wafers and chips may be sharp. Be careful when handling these with the bare hands to prevent injuries, etc. 12. When disposing of t he products, comply with the laws and ordinances of the country or region where they are used. 13. The information described herein contains copyright informa tion and know-how of ABL IC Inc. The information described herein does not convey any license under any intellec tual property rights or any other rights belonging to ABLIC Inc. or a third party. Reproduction or copying of the inf ormation from this document or any part of this document described herein for the purpose of disclosing it to a third-party is strictly prohibited without the express permission of ABLIC Inc. 14. For more details on the information described herein or any other questions, please contact ABLIC Inc.'s sales representative. 15. This Disclaimers have been delivered in a text using the Ja panese language, which text, despite any translations into the English language and the Chinese language, shall be controlling. 2.4-2019.07 www.ablic.com