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PIN-SELECTABLE WAKE-UP TIMER ICwww.ablic.com © ABLIC Inc., 2019-2020 Rev.1.1_00 The wake-up timer IC allows for intermittent system operation by periodically waking up the system. The S-35720 Series compares the timer value and the value set to the SET0 pin and the SET1 pin, and outputs a wake-up signal (interrupt signal) when the values match each other. The timer of the S-35720 is a 24-bit binary-up counter. 4 types of wake-up time (interrupt time) can be selected depending on the SET0 pin and the SET1 pin settings.  Features

  • Wake-up function Settable wake-up time (interrupt time) (Alarm interrupt function): Sele ctable as the option on the second time scale from 1 second to 194 days (Approximately half a year)
  • Low current consumption: 0.2 μA typ. (Quartz crystal: CL = 6.0 pF, VDD = 3.0 V, Ta = +25°C)
  • Wide range of operation voltage: 1.8 V to 5.5 V
  • Built-in 32.768 kHz crystal oscillation circuit
  • Operation temperature range: Ta = −40°C to +85°C
  • Lead-free (Sn 100%), halogen-free  Applications
  • IoT communications device
  • Monitoring device
  • Security device
  • Battery system
  • Energy harvesting system  Package
  • TMSOP-8

WAKE-UP TIMER IC PIN-SELECTABLE WAKE-UP TIMER IC S-35720 Series Rev.1.1_00  Block Diagram Oscillation circuit Internal reset signal Chattering elimination circuit Divider, Timing generator INT pin controller Comparator Timer (24-bit) Interrupt time setting registor Power-on detection circuit Constant voltage circuit RST XIN XOUT VDD VSS INT SET0 SET1 Pull-up Figure 1

WAKE-UP TIMER IC PIN-SELECTABLE WAKE-UP TIMER IC Rev.1.1_00 S-35720 Series  Product Name Structure 1. Product name S-35720 C xx I - K8T2 U Environmental code U: Lead-free (Sn 100%), halogen-free Product name Operation temperature I: Ta = −40°C to +85°C Package abbreviation and IC packing specification*1 K8T2: TMSOP-8, Ta pe Option code 01, 02 Fixed value C: Quartz crystal C L = 6.0 pF *1. Refer to the tape drawing. 2. Package Table 1 Package Drawing Codes Package Name Dimension Tape Reel TMSOP-8 FM008-A-P-SD FM008-A-C-SD FM008-A-R-SD 3. Product name list Table 2 Product Name RST Pin INT Pin Output Form Time-out Type SET0 Pin, SET1 Pin Settings (SET0, SET1) 0, 0 0, 1 1, 0 1, 1 S-35720C01I-K8T2U With pull-up resistor Nch open-drain output One-shot loop time-out (7.8 ms*1) 60 s 10 s 30 s 1 s S-35720C02I-K8T2U With pull-up resistor CMOS output One-shot loop time-out (125 ms*1) 60 s 10 s 30 s 1 s *1. Values of pulse width. Refer to " INT Pin Interrupt Signal Output" for the details.

WAKE-UP TIMER IC PIN-SELECTABLE WAKE-UP TIMER IC S-35720 Series Rev.1.1_00  Pin Configuration 1. TMSOP-8 Top view Figure 2 Table 3 List of Pins Pin No. Symbol Description I/O Configuration

1 RST

Input pin for reset signal Input CMOS input (With pull-up resisto r)

2 XOUT Connection pins for

quartz crystal − −

3 XIN

4 VSS GND pin − −

5 INT Output pin for

interrupt signal Output S-35720C01I: Nch open-drain output S-35720C02I: CMOS output

6 SET0 Input pins for interrupt

time setting Input CMOS input 7 SET1

8 VDD Pin for positive power

supply − −

WAKE-UP TIMER IC PIN-SELECTABLE WAKE-UP TIMER IC Rev.1.1_00 S-35720 Series  Pin Functions 1. SET0, SET1 (Input for interrupt time setting) pins These pins input the interrupt time setting signal. After the RST pin changes from "L" to "H", the S-35720 Series takes the values set to the SET0 pin and the SET1 pin. As a result, even if the SET0 pin and the SET1 pin settings are changed during timer count-up action, the interrupt time does not change. 4 types of interrupt time can be selected depending on the SET0 pin and the SET1 pin settings. 2. RST (Input for reset signal) pin This pin inputs the reset signal. The timer is reset when inputting "L" to the RST pin, and the timer starts the operation when inputting "H". The RST pin has a built-in chattering elimination circuit. Regarding the chattering elimination circuit, refer to " Chattering Elimination of RST Pin ". Besides, S-35720C01I and S-35720C02I are the products with pull-up resistor. 3. INT (Output for interrupt signal) pin This pin outputs an interrupt signal. The interrupt signal is output when the time set to the SET0 pin and the SET1 pin comes. The interrupt signal output (time- out type) is one-shot loop time-out. Regarding the operation of the interrupt signal output, refer to " INT Pin Interrupt Signal Output". Besides, S-35720C01I is the Nch open-drain output product, and S-35720C02I is the CMOS output product. 4. XIN, XOUT (Connection for quartz crystal) pins Connect a quartz crystal between the XIN pin and the XOUT pin. 5. VDD (Positive power supply) pin Connect this pin with a positive power supply. Regarding the values of voltage to be supplied, refer to " Recommended Operation Conditions". 6. VSS pin Connect this pin to GND.

WAKE-UP TIMER IC PIN-SELECTABLE WAKE-UP TIMER IC Rev.1.1_00 S-35720 Series  Absolute Maximum Ratings Table 4 Item Symbol Applied Pin Absolute Maximum Rating Unit Power supply voltage V DD − V SS − 0.3 to VSS + 6.5 V Input voltage V IN SET0, SET1 VSS − 0.3 to VSS + 6.5 V RST VSS − 0.3 to VDD + 0.3 ≤ VSS + 6.5 V Output voltage V OUT INT *1 VSS − 0.3 to VSS + 6.5 V INT *2 VSS − 0.3 to VDD + 0.3 ≤ VSS + 6.5 V Operation ambient temperature*3 T opr − −40 to +85 °C Storage temperature T stg − −55 to +150 °C *1. S-35720C01I (Nch open-drain output) *2. S-35720C02I (CMOS output) *3. Conditions with no condensation or fros t. Condensation or frost causes short- circuiting between pins, resulting in a malfunction. Caution The absolute maximum rati ngs are rated values exceeding whic h the product could suffer physical damage. These values must therefore not be exceeded under any conditions.  Recommended Operation Conditions Table 5 (VSS = 0 V) Item Symbol Condition Min. Typ. Max. Unit Operation power supply voltage V DD Ta = −40°C to +85°C 1.8 − 5.5 V  Oscillation Characteristics Table 6 (Ta = +25°C, VDD = 3.0 V, VSS = 0 V unless otherwise specified) (Quartz crystal (NX3215SD, CL = 6.0 pF) manufactured by Nihon Dempa Kogyo Co., Ltd.) Item Symbol Condition Min. Typ. Max. Unit Oscillation start voltage V STA Within 10 seconds 1.8 − 5.5 V Oscillation start time t STA − − − 1 s IC-to-IC frequency deviation*1 δIC − −20 − +20 ppm *1. Reference value

WAKE-UP TIMER IC PIN-SELECTABLE WAKE-UP TIMER IC S-35720 Series Rev.1.1_00  DC Electrical Characteristics Table 7 (Ta = −40°C to +85°C, VSS = 0 V unless otherwise specified) (Quartz crystal (NX3215SD, CL = 6.0 pF) manufactured by Nihon Dempa Kogyo Co., Ltd.) Item Symbol Applied Pin Condition Min. Typ. Max. Unit Current consumption 1 IDD1 − VDD = 3.0 V, RST pin = VDD, INT pin = no load − 0.2 0.35 μA High level input leakage current IIZH SET0, SET1, RST VIN = VDD −0.5 − 0.5 μA Low level input leakage current IIZL SET0, SET1 VIN = VSS −0.5 − 0.5 μA High level output leakage current IOZH INT *1 VOUT = VDD −0.5 − 0.5 μA Low level output leakage current IOZL INT *2 V OUT = VSS −0.5 − 0.5 μA High level input voltage VIH SET0, SET1, RST − 0.7 × VDD − V SS + 5.5 V Low level input voltage VIL SET0, SET1, RST − V SS − 0.3 − 0.3 × VDD V High level output voltage VOH INT IOH = −0.4 mA 0.8 × VDD − − V Low level output voltage VOL INT IOL = 2.0 mA − − 0.4 V Low level input current IIL RST VDD = 3.0 V, VIN = VSS −100 −30 −5 μA *1. S-35720C01I (Nch open-drain output) *2. S-35720C02I (CMOS output)

WAKE-UP TIMER IC PIN-SELECTABLE WAKE-UP TIMER IC S-35720 Series Rev.1.1_00  Power-on Detection Circuit In order for the power-on detection circuit to operate normally, raise the power supply voltage of the IC from 0.2 V or lower so that it reaches 1.8 V of the operation power supply voltage minimum value within 10 ms, as shown in Figure 9. Within 10 ms 1.8 V (Operation power supply voltage min.)

0 V*1

0.2 V or lower

*1. 0 V means that there is no potential difference between the VDD pin and the VSS pin of the S-35720 Series. Figure 9 How to Raise the Power Supply Voltage If the power supply voltage of the S-35720 Series cannot be raised under the above conditions, the power-on detection circuit may not operate normally and an oscillation may not start. In such case, perform the operations shown in "1. When power supply voltage is raised at RST pin = "L" " and "2. When power supply voltage is raised at RST pin = "H" ". 1. When power supply voltage is raised at RST pin = "L" Set the RST pin to "L" until the power supply voltage reaches 1.8 V or higher. While the RST pin is set to "L", the oscillation start signal becomes "H", and the crystal oscillation circuit normally oscillates. If the RST pin is set to "H" after the power supply voltage reaches 1.8 V, the o scillation start signal becomes "L" within 500 ms, and the oscillation status is maintained. The current consumption increases by 30 μA typ. while the RST pin is set to "L". 1.8 V (Operation power supply voltage min.) *1. 0 V means that there is no potential difference between the VDD pin and the VSS pin of the S-35720 Series. Figure 10 When Power Supply Voltage is Raised at RST Pin = "L"

WAKE-UP TIMER IC PIN-SELECTABLE WAKE-UP TIMER IC Rev.1.1_00 S-35720 Series 2. When power supply voltage is raised at RST pin = "H" Set the RST pin to "L" after the power supply voltage reaches 1.8 V or higher. If the RST pin is set to "L" for 500 ms or longer, the oscillation start signal becomes "H", and the crystal oscillation circuit normally oscillates. After that, if the RST pin is set to "H", the oscillation start signal becomes "L " within 500 ms, and the oscillation status is maintained. The current consumption increases by 30 μA typ. while the RST pin is set to "L". 10 ms 0V *1 1.8 V (Operation power supply voltage min.) *1. 0 V means that there is no potential difference between the VDD pin and the VSS pin of the S-35720 Series. Figure 11 When Power Supply Voltage is Raised at RST Pin = "H" The RST pin has a built-in chattering elimination circuit. Regarding the chattering elimination of the RST pin, refer to "  Chattering Elimination of RST Pin ".

WAKE-UP TIMER IC PIN-SELECTABLE WAKE-UP TIMER IC S-35720 Series Rev.1.1_00  Chattering Elimination of RST Pin The RST pin has a built-in chattering elimination circuit, and the output logic is active "L". Sampling is carried out 3 times at a clock period of 8 Hz and the RST pin input signal is verified. If all of the sampling results are "L", the counter is reset, if all the results are "H", a count-up action is started. The chattering elimination circuit can eliminate the pulse wi dth of 2 periods (approximately 0.25 seconds) of the clock (8 Hz). To determine the RST pin "L" or "H" input, maintain the RST pin "L" or "H" input during the period longer than 3.5 periods (0.438 seconds) of clock (8 Hz). This is because, for example, if the RST pin "L" or "H" input is 0.375 seconds, the input may not be determined depending on the clock timing. 0.375 seconds Uncertain Uncertain Chattering elimination example Counter reset Count-up action starts RST pin input signal Clock (8Hz) Reset signal after chattering elimination "L" determination "H" determination Figure 12 Example: Timing Chart of Chattering Elimination

WAKE-UP TIMER IC PIN-SELECTABLE WAKE-UP TIMER IC Rev.1.1_00 S-35720 Series  Example of Application Circuit VIN VOUT VSS VR VDD VSS SET1 RST INT XIN XOUT S-35720 VCC VSS CPU SET0 S-1xxx 10 kΩ 10 kΩ 10 kΩ VCC *1. This resistor is unnecessary in S-35720C02I (CMOS output). Figure 13 Caution The above connection diagram does not guarantee operation. Set the constants after performing sufficient evaluation using the actual application.

WAKE-UP TIMER IC PIN-SELECTABLE WAKE-UP TIMER IC Rev.1.1_00 S-35720 Series  Cautions When Using Quartz Crystal Request a matching evaluation between the IC and a quartz crystal to the quartz crystal maker.  Precautions

  • Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic protection circuit.
  • ABLIC Inc. claims no responsibility for any disputes arising out of or in connection with any infringement by products including this IC of patents owned by a third party.

WAKE-UP TIMER IC PIN-SELECTABLE WAKE-UP TIMER IC S-35720 Series Rev.1.1_00  Characteristics (Typical Data) 1. Current consumption 1 vs. Power supply voltage characteristics 2. Current consumption 1 vs. Temperature characteristics Ta = +25°C, CL = 6.0 pF Ta = +25°C, CL = 6.0 pF 1.0 0.8 0.6 0.4 0.2 420 IDD1 [μA] VDD [V] 0.8 Ta [°C] 0.6 0.4 0.2 VDD = 5.0 V VDD = 3.0 V −40 −25 0 25 50 75 85 IDD1 [μA] 3. Oscillation frequency vs. Power supply voltage characteristics 4. Oscillation frequency vs. Temperature characteristics Ta = +25°C, CL = 6.0 pF CL = 6.0 pF −20 −10 420 Δf/f [ppm] VDD [V] −40 −25 0 25 50 75 85 −200 −50 −150 Δf/f [ppm] Ta [°C] −100 5. Low level output current vs. Output voltage characteristics 6. High level output current vs. V DD − VOUT characteristics INT pin, SDA pin, Ta = +25°C INT pin, Ta = +25°C, S-35720C02I 420 IOL [mA] VOUT [V] VDD = 5.0 V VDD = 3.0 V −25 420 IOH [mA] VDD − VOUT [V] −10 −15 −20 VDD = 3.0 V VDD = 5.0 V 7. Low level input current vs. Power supply voltage characteristics RST pin, Ta = +25°C, S-35720C01I / S-35720C02I −60 420 IIL [μA] −30 −40 −50 −20 −10 VDD [V]

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Disclaimers (Handling Precautions) 1. All the information described herein (product data, specific ations, figures, tables, programs, algorithms and application circuit examples, et c.) is current as of publishing date of this document and is subject to change without notice. 2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of any specific mass-production design. ABLIC Inc. is not liable for any losses, damages, claims or dem ands caused by the reasons other than the products described herein (hereinafter "the products") or infringement o f third-party intellectual property right and any other right due to the use of the information described herein. 3. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information described herein. 4. Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute maximum ratings, operation voltage range and electrical characteristics, etc. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due to the use of the products outside their specified ranges. 5. Before using the products, co nfirm their applications, and the laws and regulations of the region or country where they are used and verify suitability, safety and other factors for the intended use. 6. When exporting the products, comply with the Foreign Exchang e and Foreign Trade Act and all other export-related laws, and follow the required procedures. 7. The products are strictly prohibited from using, providing o r exporting for the purposes of the development of weapons of mass destruction or military use. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by any provision or export to the person or entity who i ntends to develop, manufacture, use or store nuclear, biological or chemical weapons or missiles, or use any other military purposes. 8. The products are not designed to be used as part of any devi ce or equipment that may affect the human body, human life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment, aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses by ABLIC, Inc. Do not apply the products to the above listed devices and equipments. ABLIC Inc. is not liable for any losses, damages, claims or dem ands caused by unauthorized or unspecified use of the products. 9. In general, semiconductor products may fail or malfunction w ith some probability. The user of the products should therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread prevention measures, and malfunction prevention to prevent acci dents causing injury or death, fires and social damage, etc. that may ensue from the products' failure or malfunction. The entire system in which the products are used must be sufficiently evaluated and judged whether the products are allowed to apply for the system on customer's own responsibility. 10. The products are not designed to be radiation-proof. The ne cessary radiation measures should be taken in the product design by the customer depending on the intended use. 11. The products do not affect human health under normal use. H owever, they contain chemical substances and heavy metals and should therefore not be put in the mouth. The fractu re surfaces of wafers and chips may be sharp. Be careful when handling these with the bare hands to prevent injuries, etc. 12. When disposing of t he products, comply with the laws and ordinances of the country or region where they are used. 13. The information described herein contains copyright informa tion and know-how of ABL IC Inc. The information described herein does not convey any license under any intellec tual property rights or any other rights belonging to ABLIC Inc. or a third party. Reproduction or copying of the inf ormation from this document or any part of this document described herein for the purpose of disclosing it to a third-party is strictly prohibited without the express permission of ABLIC Inc. 14. For more details on the information described herein or any other questions, please contact ABLIC Inc.'s sales representative. 15. This Disclaimers have been delivered in a text using the Ja panese language, which text, despite any translations into the English language and the Chinese language, shall be controlling. 2.4-2019.07 www.ablic.com