HDL6V5541

HDL6V5541 ABLIC | Alldatasheet

Document overview

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Technical content

Features

• 0 to ±100V output voltage
• ±2.0A source and sink peak current without output blocking high-voltage (HV) diodes
• ±1.4A source and sink peak current with ±0.6 A active clamping with output blocking HV diodes
• ±1.0A source and sink peak current for acti ve ground damping with output blocking HV diodes
• 500 Ω (±50mA) active ground damping without out put blocking HV diodes (Analog SW type)
• Mutually symmetrical positive and negative pulse waveforms for low 2 nd order distortion
• 3-to-6 decoder with clock/transparent mode control
• 10 Ω active T/R switch with logic-input/direct-input mode control
• Up to 20MHz operation frequency (@±60V output, 220pF load)
• 1.8V to 5V CMOS logic interface
• Noise-cut low-voltage (LV) diodes at each output
• 4-mode output drive current control for power saving
• Thermal protection
• Latch-up free, low crosstalk between channels by SOI CMOS technology
• 64-lead 9x9mm QFN package (RoHS compliant) Fig.1 Block diagram 1.4A VNN2 VPP2 1.4A 0.6A VPP2 VNN2 0.6A 2.0A VNN1 VPP1 2.0A 1.0A GND GND 1.0A 500Ω GND driver VFP1 VFP2 bufferbuffer VFP3 buffer VSS buffer buffer VFN1 VFN2 buffer VFN3 buffer VDD buffer HVOUT1 <CH1> <CH2> <CH3> <CH4> HVOUT2 HVOUT3 HVOUT4 IN1_0 IN1_1 IN1_2 IN2_0 IN2_1 IN2_2 IN3_0 IN3_1 IN3_2 IN4_0 IN4_1 IN4_2 CC0 CC1 EN ATHP CLKEN CLK THP Thermal Protection HDL6V5541 VPP2 (0 to +100V) VPP1 (0 to +100V) VDD (+5V) VLL (+1.8 to 5V) GND VSS (-5V) VNN2 (0 to -100V) VNN1 (0 to -100V) VFP2 (VPP2-5V) VFP1 (VPP1-5V) VFN1 (VNN1+5V) VFP3 (VNN2-5V) VFN3 (VPP2+5V) VFN2 (VNN2+5V) P1 P2 P3 P4 N1 N2 N3 N4 ASW SWIN1 SWISEL Level Translator D-FF 3-to-6 Decoder Logic I/F Logic I/F SEL SWIN4 SWIN3 SWIN2 10Ω TRSW driver SWOUT1 SWOUT2 SWOUT3 SWOUT4

QUAD ±100V 2A 5-LEVEL ULTRASOUND PULSER HDL6V5541 Rev.2.1_00 1. Absolute Maximum Ratings T A=25°C unless otherwise noted. Table 1 Absolute Maximum Ratings No. Items Symbol Value Units Condition 1 Positive logic supply V LL -0.4 to +7 V 2 Positive logic and level translator supply V DD -0.4 to +7 V 3 Negative logic and level translator supply V SS -7 to +0.4 V

4 Differential high voltage supplies (VPP1 - VNN1),

(VPP2 - VNN2) +210 V 5 Positive high voltage supplies V PP1, VPP2 -0.5 to +105 V 6 Negative high voltage supplies V NN1, VNN2 -105 to +0.5 V

7 V PP1 to VPP2 voltage difference (V PP1-VPP2) -105 to +105 V HVOUTx=HiZ or GND

-0.5 to +105 V Other than above

8 V NN1 to VNN2 voltage difference (V NN1-VNN2) -105 to +105 V HVOUTx=HiZ or GND

-105 to +0.5 V Other than above

9 High voltage outputs (x=1~4)* HV OUTx -105 to +105 V

10 Floating gate drive voltages

(VPP1- VFP1), (VPP2- VFP2), (VNN2- VFP3), (VFN1- VNN1), (VFN2- VNN2), (VFN3- VPP2) -0.4 to +7 V 11 THP (Thermal Protection) output THP -0.4 to +7 V

12 All Logic input voltages (x=1~4, y=0~2)

INx_y, SWINx, SWISEL, EN, CLK, CLKEN, CC1, CC0, ATHP -0.4 to +7 V

13 Operating junction temperature T Jop -20 to +150 oC

14 Storage temperature T STG -55 to +150 oC

15 Maximum power dissipation P Dmax 4 W

Note: * Stresses beyond the absolute maximum rati ngs may cause permanent damage to the product. 2. Operating Supply Voltages, Condi tions, and Circuits (Recommended)

2.1 Operating Supply Voltages and Conditions

Table 2 Recommended Operating Supply Voltages and Conditions No Items Symbol Min Typ Max Units Condition 1 Logic voltage supply V LL 2.4 2.5 to 5 V DD V Clock mode (≤80MHz) 2.6 2.7 to 5 V DD V Clock mode (≤100MHz) 1.7 1.8 to 5 V DD V Transparent mode

2 Differential high voltage supply (VPP1 - VNN1),

(VPP2 - VNN2) 0 - 200 V

3 Positive high voltage supply V PP1, VPP2 0 - 100 V

4 Negative high voltage supply V NN1, VNN2 -100 - 0 V

5 V PP1 to VPP2 voltage difference (V PP1-VPP2) 0 - 100 V

6 V NN1 to VNN2 voltage difference (V NN1-VNN2) -100 - 0 V

QUAD ±100V 2A 5-LEVEL ULTRASOUND PULSER Rev.2.1_00 HDL6V5541 Table 2 Recommended Operating Supply Voltages and Conditions (cont.) No Items Symbol Min Typ Max Units Condition 7 Positive logic and level translator supply V DD 4.75 5 5.25 V 8 Negative logic and level translator supply V SS -5.25 -5 -4.75 V 9 P-ch floating gate drive supply 1 V FP1 V PP1-5.25 V PP1-5 V PP1-4.75 V 10 P-ch floating gate drive supply 2 V FP2 V PP2-5.25 V PP2-5 V PP2-4.75 V 11 P-ch floating gate drive supply 3 V FP3 V NN2-5.25 V NN2-5 V NN2-4.75 V 12 N-ch floating gate drive supply 1 V FN1 V NN1+4.75 V NN1+5 V NN1+5.25 V 13 N-ch floating gate drive supply 2 V FN2 V NN2+4.75 V NN2+5 V NN2+5.25 V 14 N-ch floating gate drive supply 3 V FN3 V PP2+4.75 V PP2+5 V PP2+5.25 V 15 High-level logic input voltage V IH 0.8V LL - V LL V 16 Low-level logic input voltage V IL 0 - 0.2V LL V

17 IC substrate voltage * V SUB - 0 - V

18 Slew rate limit of V PPx, VNNx (x=1,2) SR MAX - - 25 V/ms

19 Operating Free-air Temperature T A 0 25 75 oC

Note: * Substrate bottom is internally connected to the central thermal pad on the bottom of the package. It must be soldered to the ground.

2.2 Power-Up/Down Sequence

1 V LL

2 V DD, VSS

3 Set EN=1 (HV OUTx=HiZ)

4 (V PP1-VFP1), (VPP2-VFP2), (VNN2-VFP3), (VFN1-VNN1), (VFN2-VNN2), (VFN3-VPP2)

5 V PP1, VPP2, VNN1, VNN2

6 Logic control signals

1 Set EN=1 (HV OUTx=HiZ)

2 V PP1, VPP2, VNN1, VNN2

3 (V PP1-VFP1), (VPP2-VFP2), (VNN2-VFP3), (VFN1-VNN1), (VFN2-VNN2), (VFN3-VPP2)

4 V DD, VSS

5 V LL

High-voltage Change Sequence during operation

2 Change V PP1, VPP2, VNN1, VNN2

3 Logic control signals

Note: It is indispensable to avoid the occurrence of the excessive voltage beyond the maximum rating in applying and cutting of the power supplies.

QUAD ±100V 2A 5-LEVEL ULTRASOUND PULSER HDL6V5541 Rev.2.1_00

2.3 Application Circuits

(a) Clock Mode (CLKEN=0, CLK=100MHz) Fig. 2-(a) Typical Application Circuit-1 (Clock Mode) Note: 1. Power supply pins, VPPx/VNNx (x=1,2), can draw fast transient currents up to ±2.0A. Therefore, ceramic capacitors of 0.1uF to 1uF (C1~8) should be connected as close to the pins as possible for bypassing purpose. 2. Ceramic capacitors of ≥16V 0.1uF to 1uF (C9~20) also should be connected between each floating voltage pin, VFPy/VFNy (y=1~3) and power supply pin for bypassing purpose. Connect those as close to the pins as possible. 3. It is also important to minimize the trace length and to have enough trace width of those high voltage and floating voltage lines. 4. The thermal tab on the bottom of the package must be connected to the GND. 5. [PRECAUTION] External high-voltage clamp diodes between HVOUTx and VPP1/VNN1(highest voltage) as shown in Fig.2-(a) are strongly recommended to avoid excessive voltage overshoot caused by a reflection from a probe.

QUAD ±100V 2A 5-LEVEL ULTRASOUND PULSER Rev.2.1_00 HDL6V5541 (b) Transparent Mode (CLKEN=1, CLK=0) Fig. 2-(b) Typical Application Circuit-2 (Transparent Mode) Note: 1. Power supply pins, VPPx/VNNx (x=1,2), can draw fast transient currents up to ±2.0A. Therefore, ceramic capacitors of 0.1uF to 1uF (C1~8) should be connected as close to the pins as possible for bypassing purpose. 2. Ceramic capacitors of ≥16V 0.1uF to 1uF (C9~20) also should be connected between each floating voltage pin, VFPy/VFNy (y=1~3) and power supply pin for bypassing purpose. Connect those as close to the pins as possible. 3. It is also important to minimize the trace length and to have enough trace width of those high voltage and floating voltage lines. 4. The thermal tab on the bottom of the package must be connected to the GND. 5. [PRECAUTION] External high-voltage clamp diodes between HVOUTx and VPP1/VNN1(highest voltage) as shown in Fig.2-(b) are strongly recommended to avoid excessive voltage overshoot caused by a reflection from a probe.

QUAD ±100V 2A 5-LEVEL ULTRASOUND PULSER HDL6V5541 Rev.2.1_00 3. Electrical Characteristics

3.1 Clock Mode (CLKEN=0, CLK=100MHz)

Table 3 DC Characteristics (Clock mode) VLL=3.3V, V DD=5V, V SS=-5V, V FPx=VPPx-5V, V FP3=VNN2-5V, V FNx=VNNx+5V, V FN3=VPP2+5V, T A=25oC, 220pF//1k Ω load, CLK=100MHz, CLKEN=0, unless otherwise specified. No. Items Symbol Spec Units Conditions Min Typ Max

1 Input logic high current I IH

-10 - 10 μA INx_2, INx_1, INx_0, EN, CC1, CC0, CLK, CLKEN, SWINx - 66 - μA ATHP, SWISEL 50kΩ internal pull-down resistor

2 Input logic low current I IL

-10 - 10 μA INx_2, INx_1, INx_0, CLK, ATHP, SWISEL - 66 - μA EN, CC1, CC0, CLKEN, SWINx 50kΩ internal pull-up resistor

3 Input logic capacitance C IN - 2 - pF -

4 V LL current I LLQD - 0.53 - mA Quiescent current-1 EN=1(Disable), ATHP=0 Current mode=4 V PP1/VNN1=+/-100V VPP2/VNN2=+/-100V INx_y=0 ( x=1~4, y=0~2)

5 V DD current I DDQD - 10 - mA

6 V SS current I SSQD - 0.10 - mA

7 V PP1 current I PP1QD - 0 - μA

8 V NN1 current I NN1QD - 0 - μA

9 V PP2 current I PP2QD - 0.15 - mA 10 V NN2 current I NN2QD - 0.12 - mA

11 V FP1 current I FP1QD - 0 - μA

12 V FP2 current I FP2QD - 0.08 - mA

13 V FP3 current I FP3QD - 0 - μA

14 V FN1 current I FN1QD - 0 - μA

15 V FN2 current I FN2QD - 0.05 - mA

16 V FN3 current I FN3QD - 0 - μA

17 V LL current I LLQE - 0.60 - mA Quiescent current-2 EN=0(Enable), ATHP=0 Current mode=4 V PP1/VNN1=+/-100V VPP2/VNN2=+/-100V INx_y=0 ( x=1~4, y=0~2)

18 V DD current I DDQE - 10 - mA

19 V SS current I SSQE - 0.10 - mA

20 V PP1 current I PP1QE - 0 - μA

21 V NN1 current I NN1QE - 0 - μA

22 V PP2 current I PP2QE - 0.15 - mA 23 V NN2 current I NN2QE - 0.12 - mA

24 V FP1 current I FP1QE - 0 - μA

25 V FP2 current I FP2QE - 0.08 - mA

26 V FP3 current I FP3QE - 0 - μA

27 V FN1 current I FN1QE - 0 - μA

28 V FN2 current I FN2QE - 0.05 - mA

29 V FN3 current I FN3QE - 0 - μA

QUAD ±100V 2A 5-LEVEL ULTRASOUND PULSER Rev.2.1_00 HDL6V5541 Table 3 DC Characteristics (Clock mode; cont.) No. Items Symbol Spec Units Conditions Min Typ Max 30 V LL current I LLPW - 0.80 - mA Operating current-1 4-channel active Bipolar 3-level 1-cycle f=5MHz, PRT=200 μs V PP1/VNN1=+/-60V VPP2/VNN2=+/-60V EN=0, ATHP=0 Current mode=4

31 V DD current I DDPW - 13 - mA

32 V SS current I SSPW - 2.8 - mA 33 V PP1 current I PP1PW - 0.50 - mA 34 V NN1 current I NN1PW - 0.85 - mA 35 V PP2 current I PP2PW - 0.15 - mA 36 V NN2 current I NN2PW - 0.12 - mA 37 V FP1 current I FP1PW - 0.02 - mA 38 V FP2 current I FP2PW - 0.08 - mA

39 V FP3 current I FP3PW - 0 - μA

40 V FN1 current I FN1PW - 0.01 - mA 41 V FN2 current I FN2PW - 0.05 - mA

42 V FN3 current I FN3PW - 0 - μA

43 V LL current I LLPW - 0.60 - mA Operating current-2 4-channel active Bipolar 5-level 1-cycle f=3.3MHz, PRT=200 μs V PP1/VNN1=+/-60V VPP2/VNN2=+/-30V EN=0, ATHP=0 Current mode=4 See Fig.6

44 V DD current I DDPW - 13 - mA

45 V SS current I SSPW - 2.8 - mA 46 V PP1 current I PP1PW - 0.40 - mA 47 V NN1 current I NN1PW - 0.50 - mA 48 V PP2 current I PP2PW - 0.25 - mA 49 V NN2 current I NN2PW - 0.40 - mA 50 V FP1 current I FP1PW - 0.02 - mA 51 V FP2 current I FP2PW - 0.10 - mA 52 V FP3 current I FP3PW - 0.01 - mA 53 V FN1 current I FN1PW - 0.01 - mA 54 V FN2 current I FN2PW - 0.07 - mA 55 V FN3 current I FN3PW - 0.01 - mA 56 V LL current I LLCW4 - 0.70 - mA Operating current-3 4-channel active Bipolar 3-level Continuous Current mode=4 f=5MHz V PP1/VNN1=+/-5V VPP2/VNN2=+/-5V EN=0, ATHP=0

57 V DD current I DDCW4 - 20 - mA

58 V SS current I SSCW4 - 5.0 - mA

59 V PP1 current I PP1CW4 - 0 - μA

60 V NN1 current I NN1CW4 - 0 - μA

61 V PP2 current I PP2CW4 - 76 - mA

62 V NN2 current I NN2CW4 - 71 - mA

63 V FP1 current I FP1CW4 - 0 - μA

64 V FP2 current I FP2CW4 - 15 - mA

65 V FP3 current I FP3CW4 - 5.5 - mA

66 V FN1 current I FN1CW4 - 0 - μA

67 V FN2 current I FN2CW4 - 10 - mA

68 V FN3 current I FN3CW4 - 4.2 - mA

QUAD ±100V 2A 5-LEVEL ULTRASOUND PULSER HDL6V5541 Rev.2.1_00 Table 3 DC Characteristics (Clock mode; cont.) No. Items Symbol Spec Units Conditions Min Typ Max 69 V LL current I LLCW3 - 0.75 - mA Operating current-4 4-channel active Bipolar 3-level Continuous Current mode=3 f=5MHz V PP1/VNN1=+/-5V VPP2/VNN2=+/-5V EN=0, ATHP=0

70 V DD current I DDCW3 - 20 - mA

71 V SS current I SSCW3 - 5.0 - mA

72 V PP1 current I PP1CW3 - 0 - μA

73 V NN1 current I NN1CW3 - 0 - μA

74 V PP2 current I PP2CW3 - 73 - mA

75 V NN2 current I NN2CW3 - 70 - mA

76 V FP1 current I FP1CW3 - 0 - μA

77 V FP2 current I FP2CW3 - 11 - mA

78 V FP3 current I FP3CW3 - 0.20 - mA

79 V FN1 current I FN1CW3 - 0 - μA

80 V FN2 current I FN2CW3 - 7.8 - mA 81 V FN3 current I FN3CW3 - 0.20 - mA 82 V LL current I LLCW2 - 0.75 - mA Operating current-5 4-channel active Bipolar 3-level Continuous Current mode=2 f=5MHz V PP1/VNN1=+/-5V VPP2/VNN2=+/-5V EN=0, ATHP=0

83 V DD current I DDCW2 - 20 - mA

84 V SS current I SSCW2 - 5.0 - mA

85 V PP1 current I PP1CW2 - 0 - μA

86 V NN1 current I NN1CW2 - 0 - μA

87 V PP2 current I PP2CW2 - 67 - mA

88 V NN2 current I NN2CW2 - 66 - mA

89 V FP1 current I FP1CW2 - 0 - μA

90 V FP2 current I FP2CW2 - 8.0 - mA 91 V FP3 current I FP3CW2 - 0.20 - mA

92 V FN1 current I FN1CW2 - 0 - μA

93 V FN2 current I FN2CW2 - 5.8 - mA 94 V FN3 current I FN3CW2 - 0.20 - mA 95 V LL current I LLCW1 - 0.80 - mA Operating current-6 4-channel active Bipolar 3-level Continuous Current mode=1 f=5MHz V PP1/VNN1=+/-5V VPP2/VNN2=+/-5V EN=0, ATHP=0

96 V DD current I DDCW1 - 19 - mA

97 V SS current I SSCW1 - 5.0 - mA

98 V PP1 current I PP1CW1 - 0 - μA

99 V NN1 current I NN1CW1 - 0 - μA

100 V PP2 current I PP2CW1 - 59 - mA

101 V NN2 current I NN2CW1 - 59 - mA

102 V FP1 current I FP1CW1 - 0 - μA

103 V FP2 current I FP2CW1 - 4.4 - mA 104 V FP3 current I FP3CW1 - 0.20 - mA

105 V FN1 current I FN1CW1 - 0 - μA

106 V FN2 current I FN2CW1 - 3.3 - mA 107 V FN3 current I FN3CW1 - 0.20 - mA

QUAD ±100V 2A 5-LEVEL ULTRASOUND PULSER Rev.2.1_00 HDL6V5541 AC Characteristics Table 4 AC Characteristics (Clock mode) VLL=3.3V, V DD=5V, V SS=-5V, V FPx=VPPx-5V, V FP3=VNN2-5V, V FNx=VNNx+5V, V FN3=VPP2+5V, T A=25oC, 220pF//1k Ω load, EN=0, CLK=100MHz, CLKEN=0, 4-channel active, unless otherwise specified. No. Items Symbol Spec Units Conditions Min Typ Max 1 Input clock frequency f CLK - 100 - MHz See Fig.3 D=τ/T 2 Duty cycle D 40 50 60 % 3 Setup time t SU 0.8 - - ns 4 Hold time t HOLD 2.8 - - ns

5 Delay time on outputs rise t dr(on) - 65 - ns Bipolar half cycle

f=5MHz, PRT=200 μs VPP1/VNN1=VPP2/VNN2=+/-60V Current mode=4 See Fig.4

6 Delay time on outputs fall t df(on) - 65 - ns

7 Delay time off outputs rise t dr(off) - 65 - ns

8 Delay time off outputs fall t df(off) - 65 - ns

9 |t dr(on)-tdf(on)| Delay time matching Δtdelay(on) - ±1 ±3 ns 10 |t dr(off)-tdf(off)| Delay time matching Δtdelay(off) - ±1 ±3 ns

11 Output frequency range f OUT - - 20 MHz Bipolar 2-cycle

f=5MHz, PRT=200 μs VPP1/VNN1=VPP2/VNN2=+/-60V Current mode=4 See Fig.5

12 Output rise time t r - 14 - ns

13 Output fall time t f - 14 - ns

14 Second harmonic distortion HD2 - -40 - dBc

15 Second harmonic distortion HD2 - -40 - dBc

Bipolar 5-level 1-cycle, f=3.3MHz PRT=200μs, Current mode=4 VPP1/VNN1=+/-60V VPP2/VNN2=+/-30V, See Fig.6

16 Delay jitter on rise or fall t Jr, t Jf - 15 - ps

Bipolar Continuous, f=5MHz VPP1/VNN1=VPP2/VNN2=+/-5V Current mode=1, See Fig.7

17 Enable time t EN - 65 - ns EN fall edge to output burst

18 Disable time t DIS - 65 - ns EN rise edge to output HiZ

19 Clock Enable time t CLKEN - 65 - ns CLKEN fall edge to output burst

20 Clock Disable time t CLKDIS - 65 - ns CLKEN rise edge to output HiZ

21 T/R switch spike voltage

on HV OUTx and SW OUTx VTRN - - 50 mVpp 50pF//200Ω load on HV OUTx 20pF//200Ω load on SW OUTx

22 Delay time from input to T/R

• 45 - ns SWISEL=0 (logic input mode) See Fig.8 - 30 - ns SWISEL=1 (direct input mode) See Fig.8

23 Delay time from T/R switch

control start to T/R switch on tdTRON - 300 - ns 50pF//200Ω load on HV OUTx 20pF//200Ω load on SW OUTx See Fig.8 24 Delay time from T/R switch control start to T/R switch off tdTROFF - 10 - ns

QUAD ±100V 2A 5-LEVEL ULTRASOUND PULSER HDL6V5541 Rev.2.1_00 Thermal Protection Characteristics Table 5 Thermal Protection Characteristics No. Items Symbol Spec Units Conditions Min Typ Max 1 THP pull-up voltage V PUTHP - - 5.25 V Open drain 2 THP output current I THP - 1.0 - mA - 3 THP output low voltage V OLTHP - - 1.0 V V LL=3.3V, I THP=1mA

4 THP temperature threshold T THP 90 110 130 ºC

5 THP reset hysteresis T HYSTHP - 10 - ºC

Table 6 Output P-Channel MOSFET Characteristics TA=25oC No. Items Symbol Spec Units Conditions Min Typ Max 1 Output saturation current I OUTP1 - -2.0 - A Vgs=-5V, Vds=-100V I OUTP2 - -1.4 - A I OUTP3 - -0.6 - A I OUTP4 - -1.0 - A 2 Channel resistance R ONP1 - 6.5 - Ω Vgs=-5V, Id=-1A R ONP2 - 9 - Ω Vgs=-5V, Id=-0.5A R ONP3 - 21 - Ω Vgs=-5V, Id=-0.2A R ONP4 - 13 - Ω Vgs=-5V, Id=-0.4A

3 Output capacitance C OSSP1 - 30 - pF Vgs=0V, Vds=-10V, f=1MHz

Note: These items above are not tested when shipped. Table 7 Output N-Channel MOSFET Characteristics TA=25oC No. Items Symbol Spec Units Conditions Min Typ Max 1 Output saturation current I OUTN1 - 2.0 - A Vgs=5V, Vds=100V I OUTN2 - 1.4 - A I OUTN3 - 0.6 - A I OUTN4 - 1.0 - A 2 Channel resistance R ONN1 - 6.5 - Ω Vgs=5V, Id=1A R ONN2 - 9 - Ω Vgs=5V, Id=0.5A R ONN3 - 21 - Ω Vgs=5V, Id=0.2A R ONN4 - 13 - Ω Vgs=5V, Id=0.4A

3 Output capacitance C OSSN1 - 12 - pF Vgs=0V, Vds=10V, f=1MHz

Note: These items above are not tested when shipped.

QUAD ±100V 2A 5-LEVEL ULTRASOUND PULSER Rev.2.1_00 HDL6V5541 Table 8 Analog Switch Characteristics TA=25oC No. Items Symbol Spec Units Conditions Min Typ Max 1 On-state resistance (ASWx) R ONASW - 500 - Ω Vgs=5V, Id=0.01A Table 9 Output Blocking HV Diode Characteristics TA=25oC No. Items Symbol Spec Units Conditions Min Typ Max 1 Forward voltage V FDHV - 1.0 - V I F=100mA

2 Reverse voltage V RDHV 200 - - V I R=1μA

Table 10 Output Noise-cut LV Diode Characteristics TA=25oC No. Items Symbol Spec Units Conditions Min Typ Max 1 Forward voltage V FDNC - 0.85 - V I F=100mA Table 11 T/R Switch Characteristics TA=25oC No. Items Symbol Spec Units Conditions Min Typ Max 1 On-state resistance (TRSWx) R ONTRSW - 10 - Ω Vgs=5V, Vds=0.1V 2 Capacitance to the ground C dbTRSW - 9.5 - pF Vgs=5V, Vds=0.1V

QUAD ±100V 2A 5-LEVEL ULTRASOUND PULSER HDL6V5541 Rev.2.1_00

3.2 Transparent Mode (CLKEN=1, CLK=0)

Table 12 DC Characteristics (Transparent mode) VLL=3.3V, V DD=5V, V SS=-5V, V FPx=VPPx-5V, V FP3=VNN2-5V, V FNx=VNNx+5V, V FN3=VPP2+5V, T A=25oC, 220pF//1k Ω load, CLK=0, CLKEN=1, unless otherwise specified. No. Items Symbol Spec Units Conditions Min Typ Max -10 - 10 μA INx_2, INx_1, INx_0, EN, CC1, CC0, CLK, CLKEN, SWINx - 66 - μA ATHP, SWISEL 50kΩ internal pull-down resistor -10 - 10 μA INx_2, INx_1, INx_0, CLK, ATHP, SWISEL - 66 - μA EN, CC1, CC0, CLKEN, SWINx 50kΩ internal pull-up resistor

4 V LL current I LLQD - 0 - μA Quiescent current-1

EN=1(Disable), ATHP=0 Current mode=4 V PP1/VNN1=+/-100V VPP2/VNN2=+/-100V INx_y=0 ( x=1~4, y=0~2) 5 V DD current I DDQD - 1.0 - mA 6 V SS current I SSQD - 0.14 - mA 9 V PP2 current I PP2QD - 0.15 - mA 10 V NN2 current I NN2QD - 0.12 - mA 12 V FP2 current I FP2QD - 0.08 - mA 15 V FN2 current I FN2QD - 0.05 - mA 17 V LL current I LLQE - 0.07 - mA Quiescent current-2 EN=0(Enable), ATHP=0 Current mode=4 V PP1/VNN1=+/-100V VPP2/VNN2=+/-100V INx_y=0 ( x=1~4, y=0~2) 18 V DD current I DDQE - 1.3 - mA 19 V SS current I SSQE - 0.14 - mA 22 V PP2 current I PP2QE - 0.15 - mA 23 V NN2 current I NN2QE - 0.12 - mA 25 V FP2 current I FP2QE - 0.08 - mA 28 V FN2 current I FN2QE - 0.05 - mA

QUAD ±100V 2A 5-LEVEL ULTRASOUND PULSER Rev.2.1_00 HDL6V5541 Table 12 DC Characteristics (Transparent mode; cont.) No. Items Symbol Spec Units Conditions Min Typ Max 30 V LL current I LLPW - 0.33 - mA Operating current-1 4-channel active Bipolar 3-level 1-cycle f=5MHz, PRT=200 μs V PP1/VNN1=+/-60V VPP2/VNN2=+/-60V EN=0, ATHP=0 Current mode=4 31 V DD current I DDPW - 3.5 - mA 32 V SS current I SSPW - 2.8 - mA 33 V PP1 current I PP1PW - 0.50 - mA 34 V NN1 current I NN1PW - 0.85 - mA 35 V PP2 current I PP2PW - 0.15 - mA 36 V NN2 current I NN2PW - 0.12 - mA 37 V FP1 current I FP1PW - 0.02 - mA 38 V FP2 current I FP2PW - 0.08 - mA 40 V FN1 current I FN1PW - 0.01 - mA 41 V FN2 current I FN2PW - 0.05 - mA 43 V LL current I LLPW - 0.37 - mA Operating current-2 4-channel active Bipolar 5-level 1-cycle f=3.3MHz, PRT=200 μs V PP1/VNN1=+/-60V VPP2/VNN2=+/-30V EN=0, ATHP=0 Current mode=4 See Fig.6 44 V DD current I DDPW - 3.7 - mA 45 V SS current I SSPW - 2.8 - mA 46 V PP1 current I PP1PW - 0.40 - mA 47 V NN1 current I NN1PW - 0.50 - mA 48 V PP2 current I PP2PW - 0.25 - mA 49 V NN2 current I NN2PW - 0.40 - mA 50 V FP1 current I FP1PW - 0.02 - mA 51 V FP2 current I FP2PW - 0.10 - mA 52 V FP3 current I FP3PW - 0.01 - mA 53 V FN1 current I FN1PW - 0.01 - mA 54 V FN2 current I FN2PW - 0.07 - mA 55 V FN3 current I FN3PW - 0.01 - mA 56 V LL current I LLCW4 - 0.18 - mA Operating current-3 4-channel active Bipolar 3-level Continuous Current mode=4 f=5MHz V PP1/VNN1=+/-5V VPP2/VNN2=+/-5V EN=0, ATHP=0

57 V DD current I DDCW4 - 11 - mA

58 V SS current I SSCW4 - 5.7 - mA 65 V FP3 current I FP3CW4 - 5.5 - mA 68 V FN3 current I FN3CW4 - 4.2 - mA

QUAD ±100V 2A 5-LEVEL ULTRASOUND PULSER HDL6V5541 Rev.2.1_00 Table 12 DC Characteristics (Transparent mode; cont.) No. Items Symbol Spec Units Conditions Min Typ Max 69 V LL current I LLCW3 - 0.24 - mA Operating current-4 4-channel active Bipolar 3-level Continuous Current mode=3 f=5MHz V PP1/VNN1=+/-5V VPP2/VNN2=+/-5V EN=0, ATHP=0

70 V DD current I DDCW3 - 11 - mA

71 V SS current I SSCW3 - 5.6 - mA 78 V FP3 current I FP3CW3 - 0.20 - mA 80 V FN2 current I FN2CW3 - 7.8 - mA 81 V FN3 current I FN3CW3 - 0.20 - mA 82 V LL current I LLCW2 - 0.24 - mA Operating current-5 4-channel active Bipolar 3-level Continuous Current mode=2 f=5MHz V PP1/VNN1=+/-5V VPP2/VNN2=+/-5V EN=0, ATHP=0

83 V DD current I DDCW2 - 11 - mA

84 V SS current I SSCW2 - 5.5 - mA 90 V FP2 current I FP2CW2 - 8.0 - mA 91 V FP3 current I FP3CW2 - 0.20 - mA 93 V FN2 current I FN2CW2 - 5.8 - mA 94 V FN3 current I FN3CW2 - 0.20 - mA 95 V LL current I LLCW1 - 0.30 - mA Operating current-6 4-channel active Bipolar 3-level Continuous Current mode=1 f=5MHz V PP1/VNN1=+/-5V VPP2/VNN2=+/-5V EN=0, ATHP=0

96 V DD current I DDCW1 - 10 - mA

97 V SS current I SSCW1 - 5.2 - mA 103 V FP2 current I FP2CW1 - 4.4 - mA 104 V FP3 current I FP3CW1 - 0.20 - mA 106 V FN2 current I FN2CW1 - 3.3 - mA 107 V FN3 current I FN3CW1 - 0.20 - mA

QUAD ±100V 2A 5-LEVEL ULTRASOUND PULSER Rev.2.1_00 HDL6V5541 AC Characteristics Table 13 AC Characteristics (Transparent mode) VLL=3.3V, V DD=5V, V SS=-5V, V FPx=VPPx-5V, V FP3=VNN2-5V, V FNx=VNNx+5V, V FN3=VPP2+5V, T A=25oC, 220pF//1k Ω load, EN=0, CLK=0, CLKEN=1, 4-channel active, unless otherwise specified. No. Items Symbol Spec Units Conditions Min Typ Max

1 Delay time on outputs rise t dr(on) - 60 - ns Bipolar half cycle

f=5MHz, PRT=200 μs VPP1/VNN1=VPP2/VNN2=+/-60V Current mode=4 See Fig.4

2 Delay time on outputs fall t df(on) - 60 - ns

3 Delay time off outputs rise t dr(off) - 60 - ns

4 Delay time off outputs fall t df(off) - 60 - ns

5 |t dr(on)-tdf(on)| Delay time matching Δtdelay(on) - ±1 ±3 ns 6 |t dr(off)-tdf(off)| Delay time matching Δtdelay(off) - ±1 ±3 ns

7 Output frequency range f OUT - - 20 MHz Bipolar 2-cycle

f=5MHz, PRT=200 μs VPP1/VNN1=VPP2/VNN2=+/-60V Current mode=4 See Fig.5

8 Output rise time t r - 14 - ns

9 Output fall time t f - 14 - ns

10 Second harmonic distortion HD2 - -40 - dBc

11 Second harmonic distortion HD2 - -40 - dBc

Bipolar 5-level 1-cycle, f=3.3MHz PRT=200μs, Current mode=4 VPP1/VNN1=+/-60V VPP2/VNN2=+/-30V, See Fig.6

12 Delay jitter on rise or fall t Jr, t Jf - 15 - ps

Bipolar Continuous, f=5MHz VPP1/VNN1=VPP2/VNN2=+/-5V Current mode=1, See Fig.7

13 Enable time t EN - 60 - ns EN fall edge to output burst

14 Disable time t DIS - 60 - ns EN rise edge to no output

15 Clock Enable time t CLKEN - 65 - ns CLKEN fall edge to output burst

16 Clock Disable time t CLKDIS - 65 - ns CLKEN rise edge to output HiZ

17 T/R switch spike voltage

on HVOUTx and SWOUTx VTRN - - 50 mVpp 50pF//200Ω load on HVOUTx 20pF//200Ω load on SWOUTx

18 Delay time from input to T/R

• 45 - ns SWISEL=0 (logic input mode) See Fig.8 - 30 - ns SWISEL=1 (direct input mode) See Fig.8

19 Delay time from T/R switch

control start to T/R switch on tdTRON - 300 - ns 50pF//200Ω load on HVOUTx 20pF//200Ω load on SWOUTx See Fig.8 20 Delay time from T/R switch control start to T/R switch off tdTROFF - 10 - ns See Table 5 through 11 for the characteristics of Thermal Protection, and Devices.

QUAD ±100V 2A 5-LEVEL ULTRASOUND PULSER HDL6V5541 Rev.2.1_00 4. Switching Time Diagram (EN=0) Clock Enable (CLKEN=0) Clock Disable (CLKEN=1) Fig. 3 Setup/hold time Fig. 4 Propagation delay time Fig. 6 5-level 1-cycle operation Fig. 7 Delay jitter on rise/fall INx_2 VLL GND INx_1 VLL GND INx_0 VLL GND HVOUTx GND VPP2 VNN2 tdr 50% 50% tJr=Δtdr(1σ) tdf 50% 50% tJf =Δtdf (1σ) CLK INx_<2:0> HVOUTx 50%50% 50%(D0) (D1) tSU 50% (D2) tHOLD (D0) (D1) (D2) Don't Care CLK τ T INx_<2:0> HVOUTx Fig. 5 Output rise/fall time Fig. 8 T/R switch delay time INx_2 VLL GND INx_1 VLL GND INx_0 VLL GND T/R SW state 50% tdTR control starts tdTRON OFF OFF ON tdTR control starts tdTROFF 50% SWINx VLL GND T/R SW state 50% tdTR control starts tdTRON OFF OFFON tdTR control starts tdTROFF 50% Logic input mode (SWISEL=0) Direct input mode (SWISEL=1) INx_2 VLL GND INx_1 VLL GND INx_0 VLL GND HVOUTx VPP1 GND tdr(on) VNN1 50% 50% 50% 10% 10% PRT 90% tdf(off) tdr(off) tdf(on) 90% 50% 50% INx_2 VLL GND INx_1 VLL GND INx_0 VLL GND HVOUTx VPP1 GND trtf VNN1 80% 80% 80% 80% INx_2 VLL GND INx_1 VLL GND INx_0 VLL GND HVOUTx VPP1 GND VNN1 VPP2 VNN2

QUAD ±100V 2A 5-LEVEL ULTRASOUND PULSER Rev.2.1_00 HDL6V5541 5. Truth Table Table 14 Truth table *1) When current mode is other than 4, both P3 and N3 are always off-state. Note:  SWISEL=0 (logic input mode)  V PP1/ VNN1=+/-HV1, VPP2/ VNN2=+/-HV2  x=1~4 6. Current Mode Control Table Table 15 Drive current mode control table Note: *1) Output saturation current @ |Vds|=100V Following current mode is recommended:  Current mode=4 for high voltage, short pulse train operations (e.g. V PP1/VNN1=VPP2/VNN2=+/-60V, 2-cycle, PRT=200us)  Current mode=2 for low voltage, long pulse trai n or even continuous wave operations (e.g. VPP1/VNN1=VPP2/VNN2=+/-3V, continuous wave) IOUT [A] *1 Current Mode CC1 CC0 P2 N2 1 0 0 0.35 0.35 20 1 0 . 7 0 . 7 3 1 0 1.05 1.05 41 1 1 . 4 1 . 4 EN INx_2 INx_1 INx_0 P1 N1 P2 N2 P3 N3 P4 N4 ASW TRSW HV OUTx Pol HV1 HV2 +HV1 -HV1 +HV2 -HV2 -HV2 +HV2 GND GND GND 0 0 0 0 OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF HiZ

0001 O F F O F F ON OFF OFF ON

*1 OFF OFF OFF OFF +HV2 0 0 1 0 OFF OFF OFF OFF OFF OFF OFF OFF OFF ON HiZ + TRSW ON

0011 ON O F FO F FO F FO F FO F FO F FO F FO F FO F F + H V 1

0 1 0 0 OFF OFF OFF OFF OFF OFF ON ON ON OFF GND

0101 O F F O F F O F F ON ON *1 O F FO F FO F FO F FO F F - H V 2

0 1 1 0 OFF OFF OFF OFF OFF OFF ON ON ON ON GND + TRSW ON

0111 O F F ON OFF OFF OFF OFF OFF OFF OFF OFF -HV1

1 X X X OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF HiZ

Logic Inputs HV MOSFET status Output

QUAD ±100V 2A 5-LEVEL ULTRASOUND PULSER HDL6V5541 Rev.2.1_00 7. Pin Configuration Table 16 Pin Configuration Pin# Pin Name I/O Function

1 IN1_0 I Input logic control of the least signi ficant bit of channel 1, HV2 control

2 IN1_1 I Input logic control of 2nd significant bit of channel 1, HV1 control

3 IN1_2 I Input logic control of the most signifi cant bit of channel 1, polarity control

4 IN2_0 I Input logic control of the least signi ficant bit of channel 2, HV2 control

5 IN2_1 I Input logic control of 2nd significant bit of channel 2, HV1 control

6 IN2_2 I Input logic control of the most signifi cant bit of channel 2, polarity control

7 SWISEL I Control of T/R SW input mode, Hi=direct pin input, Low=logic input

(50kΩ internal pull-down resistor) 8 VLL - Positive voltage supply of low voltage interface (+3.3V)

9 CLK I Clock Input (100MHz)

10 GND - Drive power ground (0V)

11 IN3_0 I Input logic control of the least signi ficant bit of channel 3, HV2 control

12 IN3_1 I Input logic control of 2nd significant bit of channel 3, HV1 control

13 IN3_2 I Input logic control of the most signifi cant bit of channel 3, polarity control

14 IN4_0 I Input logic control of the least signi ficant bit of channel 4, HV2 control

15 IN4_1 I Input logic control of 2nd significant bit of channel 4, HV1 control

16 IN4_2 I Input logic control of the most signifi cant bit of channel 4, polarity control

17 EN I Control of drive output enable, Hi=off, Low=on (50k Ω internal pull-up resistor)

18 CLKEN I Control of clock enable, Hi=clock disable, Low=clock enable (50k Ω internal pull-up resistor)

19 ATHP I Control of active THP enable, Hi=disable, Low=enable (50k Ω internal pull-down resistor)

20 THP O Thermal protection output, open N-MOS drain

21 VSS - Negative low voltage power supply (-5V)

22 VFP3 - P-MOS (P3) floating gate drive power supply (VNN2-5V)

23 VFN1 - N-MOS (N1) floating gate drive power supply (VNN1+5V)

24 VFN2 - N-MOS (N2) floating gate drive power supply (VNN2+5V)

25 GND - Drive power ground (0V)

26 VFP2 - P-MOS (P2) floating gate drive power supply (VPP2-5V)

27 VFN3 - N-MOS (N3) floating gate dr ive power supply (VPP2+5V)

28 VFP1 - P-MOS (P1) floating gate drive power supply (VPP1-5V)

29 SWIN3 I Control of T/R switch of channel 3 @SWISEL=Hi, Hi=off, Low=on

(50kΩ internal pull-up resistor)

30 SWIN4 I Control of T/R switch of channel 4 @SWISEL=Hi, Hi=off, Low=on

(50kΩ internal pull-up resistor)

31 GND - Drive power ground (0V)

32 SWOUT4 O Output of T/R switch of channel 4

QUAD ±100V 2A 5-LEVEL ULTRASOUND PULSER Rev.2.1_00 HDL6V5541 Table 16 Pin Configuration (cont.) Pin# Pin Name I/O Function

33 VPP1 - Positive high voltage power supply 1 for channel 3,4 (0 to +100V)

34 VPP2 - Positive high voltage power supply 2 fo r channel 3,4 (0 to +100V, VPP2<VPP1)

35 HVOUT4 O Output high voltage for channel 4

36 HVOUT3 O Output high voltage for channel 3

37 VNN2 - Negative high voltage power supply 2 for channel 3,4 (0 to -100V, VNN2>VNN1)

38 VNN1 - Negative high voltage power supply 1 for channel 3,4 (0 to -100V)

39 SWOUT3 O Output of T/R switch of channel 3

40 GND - Drive power ground (0V)

41 GND - Drive power ground (0V)

42 SWOUT2 O Output of T/R switch of channel 2

43 VNN1 - Negative high voltage power supply 1 for channel 1,2 (0 to -100V)

44 VNN2 - Negative high voltage power supply 2 for channel 1,2 (0 to -100V, VNN2>VNN1)

45 HVOUT2 O Output high voltage for channel 2

46 HVOUT1 O Output high voltage for channel 1

47 VPP2 - Positive high voltage power supply 2 for channel 1,2 (0 to +100V)

48 VPP1 - Positive high voltage power supply 1 for channel 1,2 (0 to +100V)

49 SWOUT1 O Output of T/R switch of channel 1

50 GND - Drive power ground (0V)

51 SWIN1 I Control of T/R switch of channel 1 @SWISEL=Hi, Hi=off, Low=on

(50kΩ internal pull-up resistor)

52 SWIN2 I Control of T/R switch of channel 2 @SWISEL=Hi, Hi=off, Low=on

(50kΩ internal pull-up resistor)

53 VFP1 - P-MOS (P1) floating gate drive power supply (VPP1-5V)

54 VFN3 - N-MOS (N3) floating gate dr ive power supply (VPP2+5V)

55 VFP2 - P-MOS (P2) floating gate drive power supply (VPP2-5V)

56 GND - Drive power ground (0V)

57 VFN2 - N-MOS (N2) floating gate drive power supply (VNN2+5V)

58 VFN１ - N-MOS (N1) floating gate drive power supply (VNN1+5V)

59 VFP3 - P-MOS (P3) floating gate drive power supply (VNN2-5V)

60 VDD - Positive low voltage power supply (+5V)

61 CC0 I Control of drive current mode 0 (50k Ω internal pull-up resistor)

62 CC1 I Control of drive current mode 1 (50k Ω internal pull-up resistor)

63 GND - Drive power ground (0V)

64 GND - Drive power ground (0V)

QUAD ±100V 2A 5-LEVEL ULTRASOUND PULSER HDL6V5541 Rev.2.1_00  Package Table 17 Package Drawing Codes Package Name Dimension Tray Marking Land Packing QFN-64(0909)B QN064-B-P-SD QFN9x9-B-T-S D QN064-B-M-S4 QN064-B-L-SD QN064-B-K-SD  Storage, Mounting 1. Storage conditions 1. 1 The storage location should be kept at 5 to 35 °C and 40 to 70% relative humidity. Keeping in a dry box is recommended. Moisture-proof property is assured fo r 12 months from delivery date for sealed moisture- proof packing, while it is guaranteed for 7 days from unpacked date under the condition above. 1. 2 When the storage conditions do not c onform to those above or other cond itions occur indicating moisture exposure, the ICs should be dried to avoid package cracks. A baking process at 125°C lasting for 24 hours results in sufficient dehumidification. The baking is not allowed more than t wice, and the ICs should be mounted within 7 days after initial baking or within 10 days of total exposure after the second dehumidification. 2. Reflow soldering The temperature rise may be different in the resin and a terminal part due to the reflow soldering. It is necessary to check the package surface temperature (resin) before setting the temperature profile. Fig. 9 shows the resistance to soldering heat condition for package (Reflow method). Confirm the heat resistance of the package shown below. (Based on JEDEC J-STD-020). More than 217°C 60 to 150 s Time: 8 min max. to peak Ramp up rate: 3°C/s max. 10 s max. Peak temperature: 260°C More than 255°C 30 s max. Temperature measurement point: resin surface temperature Temp. Time 25°C Ramp down rate: 6°C/s max. 200°C 150°C Preheat area: 60 to 120 s Fig. 9 Resistance to Soldering Heat Condition for Package (Reflow Method)

QUAD ±100V 2A 5-LEVEL ULTRASOUND PULSER Rev.2.1_00 HDL6V5541  Important Notice 1. ABLIC Inc. warrants performance of it s hardware products (hereinafter calle d “products”) to the specifications applicable at the time of sale in accordance with the Product Specificati on. Testing and other quality control techniques are utilized to the extent ABLIC Inc. needs to meet specifications described in the Product Specification. Specific testing of all parameters of each device is no t necessarily performed, except those mandated by related laws and/or regulations. 2. Should any claim be made within one month of product de livery about products’ failure to meet performance described in the Product Specification, all the products in relevant lot(s) shall be re-tested and re-delivered. Products delivered more than one month before such claim shall not be counted for such response. 3. ABLIC Inc. assumes no obligation or any way of com pensation should any fault about customer products and applications using ABLIC Inc. products be found in marketplace. Only in such a case fault of ABLIC Inc. is evident and products concerned do not meet the Product Specification, compensation shall be conducted if claimed within one year of product delivery up to in the way of product replacement or payment of equivalent amount. 4. ABLIC Inc. reserves the right to make changes to t he Product Specification at any time and to discontinue mass production of the relevant products without notice. Customers are advised bef ore placing orders to confirm that the Product Specification of inquiry is the latest version and that the rele vant product is currently on mass production status. 5. In no event shall ABLIC Inc. be liable for any damage that may result from an accident or any other cause during operation of the user’s units according to the Product Specification. ABLIC Inc. assumes no responsibility for any intellectual property claims or any ot her problems that may result from a pplications of information, products or circuits described in the Product Specification. 6. No license is granted by the Product Specification under any patents or other rights of any third party or ABLIC Inc. 7. The Product Specification may not be r eproduced or duplicated, in any form, in whole or in part, without the expressed written permission of ABLIC Inc. 8. Resale of ABLIC Inc. products with statements differ ent from or beyond the parameters described in the Product Specification voids all express and any implied warranties for the products, and is an unfair and deceptive business practice. ABLIC Inc. is not responsible or liable for any such statements. 9. Products (technologies) described in the Product Specification are not to be provided to any party whose purpose in their application will hinder maintenance of internatio nal peace and safety nor are they to be applied to that purpose by their direct purchasers or any third party. When exporting those products (technologies), the necessary procedures are to be taken in accordance with related laws and regulations.

QUAD ±100V 2A 5-LEVEL ULTRASOUND PULSER HDL6V5541 Rev.2.1_00  Cautions 1. Customers are advised to follow the cautions below to protect products from damage ca used by electrical static discharge (ESD). 1. 1 Material of container or any device to carry pr oducts should be free from ESD, which may be caused by vibration while transportation. It is recommended that electric-conductive container or aluminum sheet be used as an effective countermeasure. 1. 2 Those that touch products, such as work platform, machine, or measuremen t/test equipment, should be grounded. 1. 3 Those who deal with products should be grounded through a large series impedance around 100k Ω to 1MΩ. 1. 4 Prevent friction with other materials made with high polymer. 1. 5 Prevent vibration or friction when carrying the printed circuit board (P CB) where products are mounted. To short circuit terminals is a recommended countermeasure to keep the same electric potential on the PCB. 1. 6 Avoid dealing with or storing produc ts in an extremely arid environment. 2. “Absolute maximum ratings” should never be exceeded dur ing use regardless of any change in external conditions. Otherwise, products may be damaged or destroyed. In no event shall ABLIC Inc. be liable for any failure in products or any secondary damage resulting from use at a value exceeding the absolute maximum ratings. 3. Products may experience failures due to accident or u nexpected surge voltages. Accordingly, adopt safe design features, such as redundancy or prevention of erroneous action, to avoid extensive damage in the event of a failure. (If a semiconductor device fails, there may be cases in which the semiconductor device, wiring or wiring pattern will emit smoke or cause a fire or in which the semiconductor device will burst.) 4. Products may experience failures or malf unction in poor surroundings, such as electrical leakage in products due to long-term use in high humidity, malfunctioning or pe rmanent damage due to chemical reaction of products in corrosive environment or due to discharge by strongly charged object near products or due to excessive mechanical shock. To use products in radiation environment is not assumed. To use products near material easy to ignite may cause a fire due to its flammable package. Avoid using products in such environment or take appropriate countermeasures depending on the environment. 5. Products are not designed, manufactured, or warranted to be suitable for use where extremely high reliability is required (such as use in nuclear pow er control, aerospace and aviation, traffic equipment, life-support-related medical equipment, fuel control equipment and various kinds of safety equipment). Inclusion of products in such application shall be fully at the risk of customers. ABLIC Inc. assumes no liability for applications assistance, customer product design, or performance.

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Disclaimers (Handling Precautions) 1. All the information described herein (product data, specific ations, figures, tables, programs, algorithms and application circuit examples, et c.) is current as of publishing date of this document and is subject to change without notice. 2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of any specific mass-production design. ABLIC Inc. is not liable for any losses, damages, claims or dem ands caused by the reasons other than the products described herein (hereinafter "the products") or infringement o f third-party intellectual property right and any other right due to the use of the information described herein. 3. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information described herein. 4. Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute maximum ratings, operation voltage range and electrical characteristics, etc. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due to the use of the products outside their specified ranges. 5. Before using the products, co nfirm their applications, and the laws and regulations of the region or country where they are used and verify suitability, safety and other factors for the intended use. 6. When exporting the products, comply with the Foreign Exchang e and Foreign Trade Act and all other export-related laws, and follow the required procedures. 7. The products are strictly prohibited from using, providing o r exporting for the purposes of the development of weapons of mass destruction or military use. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by any provision or export to the person or entity who i ntends to develop, manufacture, use or store nuclear, biological or chemical weapons or missiles, or use any other military purposes. 8. The products are not designed to be used as part of any devi ce or equipment that may affect the human body, human life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment, aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses by ABLIC, Inc. Do not apply the products to the above listed devices and equipments. ABLIC Inc. is not liable for any losses, damages, claims or dem ands caused by unauthorized or unspecified use of the products. 9. In general, semiconductor products may fail or malfunction w ith some probability. The user of the products should therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread prevention measures, and malfunction prevention to prevent acci dents causing injury or death, fires and social damage, etc. that may ensue from the products' failure or malfunction. The entire system in which the products are used must be sufficiently evaluated and judged whether the products are allowed to apply for the system on customer's own responsibility. 10. The products are not designed to be radiation-proof. The ne cessary radiation measures should be taken in the product design by the customer depending on the intended use. 11. The products do not affect human health under normal use. H owever, they contain chemical substances and heavy metals and should therefore not be put in the mouth. The fractu re surfaces of wafers and chips may be sharp. Be careful when handling these with the bare hands to prevent injuries, etc. 12. When disposing of t he products, comply with the laws and ordinances of the country or region where they are used. 13. The information described herein contains copyright informa tion and know-how of ABL IC Inc. The information described herein does not convey any license under any intellec tual property rights or any other rights belonging to ABLIC Inc. or a third party. Reproduction or copying of the inf ormation from this document or any part of this document described herein for the purpose of disclosing it to a third-party is strictly prohibited without the express permission of ABLIC Inc. 14. For more details on the information described herein or any other questions, please contact ABLIC Inc.'s sales representative. 15. This Disclaimers have been delivered in a text using the Ja panese language, which text, despite any translations into the English language and the Chinese language, shall be controlling. 2.4-2019.07 www.ablic.com