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Technical content

Features

► Minimal component count (base config: CL8800 + 6 resistors + diode bridge) ► No magnetics, no capacitors ► Up to 7.5W output (13W w/ heat sink) ► >110Lm/W using efficient LEDs ► 85% typical electrical efficiency ► >0.95 power factor ► <20% THD line current ► Low conducted EMI w/o filters ► 85% LED luminous utilization ► Phase dimmer compatible with an RC network

Applications

► Fluorescent tube retrofit ► Incandescent & CFL bulb replacement ► General LED lighting General Description The CL8800 is designed to drive a long string of inexpensive, low current LEDs directly from the AC mains. A basic driver circuit consists of the CL8800, six resistors, and a bridge rectifier. Two to four additional components are optional for various levels of transient protection. No capacitors, EMI filters, or power factor correction circuits are needed. A string of series/parallel LEDs is tapped at six locations. Six linear current regulators sink current at each tap and are sequentially turned on and off, tracking the input sine wave voltage. Voltage across each regulator is minimized when conducting, providing high efficiency. Output current at each tap is individually resistor- adjustable. Cross-regulation, as the CL8800 switches from one regulator to another, provides smooth transitions. The current waveform can be tailored to optimize for input voltage range, line/load regulation, output power/current, efficiency, power factor, THD, dimmer compatibility, and LED utilization. With the addition of an RC network, the driver is compatible with phase dimming. Typical Application Circuit Sequential Linear LED Driver BIAS GND CL8800 SET1 SET2 SET3 SET4 SET5 SET6 AC Mains TAP1 TAP2 TAP3 TAP4 TAP5 TAP6 additional components for 230VAC 100 - 120VAC Transient Protection

Supertex inc. www.supertex.com Doc.# DSFP-CL8800 D031914 Absolute Maximum Ratings Parameter Value VBIAS, VTAP1 –0.5V to +550V VTAP2 – 6 –0.5V to +320V VSET1 – 6 4.0V Operating junction temperature -55ºC to +125ºC Storage temperature, TS -65°C to +150°C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Pin Configuration Product Marking

Ordering Information

Part Number Package Options Packing CL8800K63-G 33-Lead (6x6) QFN 490/Tray CL8800K63-G M935 33-Lead (6x6) QFN 2000/Reel 33-Lead QFN 8800 LLLLLL YYWW AAACCC L = Lot Number YY = Year Sealed WW = Week Sealed A = Assembler ID C = Country of Origin = “Green” Packaging 33-Lead QFN (top view) SET1 NC SET2 NC SET3 NC SET4 NC SET5 SET6 BIAS TAP1 TAP2 TAP3 TAP4 TAP5 TAP6 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND Typical Thermal Resistance Package θja 1 θjc 33-Lead QFN 24OC/W 2.5OC/W Sym Parameter Min Typ Max Units Conditions Recommended Operating Conditions IOUT Output current TAP1 - - 60 mA --- TAP2 - - 90 TAP3 - - 115 TAP4 - - 115 TAP5 - - 115 TAP6 - - 115 VOUT Output voltage TAP1 - - 400 V Non-conducting TAP2-6 - - 300 Non-conducting TAP1-6 - - (1) Conducting VBIAS Applied BIAS voltage - - 440 V --- Note: (1) Voltage capability is determined by power dissipation (V × I). -G denotes a lead (Pb)-free / RoHS compliant package ESD Sensitive Device Notes: 1. 1.0oz Cu 4-layer board, 3x4” PCB with thermal pad and thermal via array. 2. Junction to exposed heat slug.

Supertex inc. www.supertex.com Doc.# DSFP-CL8800 D031914 Sym Parameter Min Typ Max Units Conditions IBIAS BIAS pin input current - 250 410 µA VBIAS = 340V ITAP(ON) Output current, on TAP1 60 - - mA VTAP1 = 30V, VSET1~6 = GND TAP2 90 - - VTAP2 = 17V, VSET1~6 = GND TAP3 115 - - VTAP3 = 17V, VSET1~6 = GND TAP4 115 - - VTAP4 = 17V, VSET1~6 = GND TAP5 115 - - VTAP5 = 17V, VSET1~6 = GND TAP6 115 - - VTAP6 = 17V, VSET1~6 = GND ITAP(OFF) Output current, off - 0 10 µA TAP1 - 5, VBIAS = 312V Electrical Characteristics (over recommended operating conditions at 25°C unless specified otherwise) Output Current Thermal Characteristics 250 200 150 100 IOUT (mA) -60 -40 -20 0 20 40 60 80 100 120 140 Temperature (°C) Maximum Output Current Taps 4&5 Taps 3&6 Tap 2 Tap 1 Simplified Block Diagram BIAS GND CL8800 SET1 SET2 SET3 SET4 SET5 SET6 TAP1 TAP2 TAP3 TAP4 TAP5 TAP6 in reg 1 0 in reg 1 0 in reg 1 0 in reg 1 0 in reg 1 0 1 0 22Ω 33Ω 275VAC 10mm 440VDC 1.5kW RSET1 RSET2 RSET3 RSET4 RSET5 RSET6 AC Mains additional components for 230VAC 100 - 120VAC Transient Protection

Supertex inc. www.supertex.com Doc.# DSFP-CL8800 D031914 Overview Designing a driver to meet particular requirements may be a difficult task considering the number of design variables (18): tap current (6), number of series-connected LEDs per segment (6), and the number of parallel-connected LEDs per segment (6). Manually selecting values will provide light, but the chosen values may be far from optimal in regards to efficiency, LED utilization, line regulation, etc. Contact your nearest Supertex Field Applications Engineer for design assistance. MathCAD and Excel worksheets are available by contacting apps@supertex.com. In addition to configuring the driver, several circuits may be employed to increase reliability, performance, and cost. The following sections briefly describe these circuits. Transient Protection Since the driver circuits have no need for capacitors that could otherwise absorb transient energy, nor is there a need for EMI filters that would block transients, the full burden of transient protection is borne by the protection circuit. The two-stage approach in the following schematics provide 2.5kV protection, both pulse and ring per EN 61000-4-5 and EN 61000-4-12, six hits each. 100 to 120VAC Transient Protection 230VAC Transient Protection Zener Substitution Zeners may be substituted for LEDs in the bottom stages. The last 1 or 2 stages contribute little to light output - they are mainly to off-load the adjacent upstream regulator at high line voltages to minimize losses. Zener substitution advan- tages include minimizing unlit LEDs at low line for better light uniformity, better line regulation at high line, fewer LEDs for lower cost and less PCB area, and fewer board-to-board con- nections. Disadvantages include slightly reduced efficiency at high line, and additional heat load on the driver board. Phase Dimming As with any light load, the LED lamp might not draw enough current to assure proper dimmer operation. This is especial- ly true for 230VAC dimmers. Triacs used in dimmers require a minimum latching current when triggered to place the triac in the latched-on state. Once latched, a minimum holding current is required to maintain the triac in the on state. Latch- ing current is many times greater than the holding current, and is the main concern with dimmer compatibility. Higher latching current can be provided by a simple series RC network across the AC line. A short time constant pro- vides a current spike at the turn-on edge. Less common is inadequate holding current. The minimum dimmer holding current is typically 10-20mA. Tap1 at 60mA (max) exceeds the minimum. Flicker Twice per AC line cycle the line voltage crosses zero volts, during which time there is no light output. The circuit below can provide 5-10% valley fill. It has little effect on input current waveshape (THD, PF) and efficiency. Power Boost Higher output power can be achieved by off-loading a por- tion of the power dissipation from the CL8800 to external FETs. The circuit below drops most of the tap voltage across the FETs, thereby shifting the bulk of the dissipation to the FET. 22Ω 150VAC 10mm AC Line 22Ω 33Ω 275VAC 10mm 440VDC 1.5kW AC Line Bridge RectifierAC Line Transient Protection 500Ω 100 - 200nF TAP6 TAP7 to LEDs to LEDs 200kΩ 15V

Supertex inc. www.supertex.com Doc.# DSFP-CL8800 D031914 Valley Fill Circuit BIAS CL8800 SET1 SET2 SET3 SET4 SET5 SET6 GND TAP1 TAP2 TAP3 TAP4 TAP5 TAP6 CF1 QF2 DN3135RF3 RF2 150kΩ RF1 10kΩ QF1 Optional flicker reduction circuit (valley fill) RS1 RS2 RS3 RS4 RS6 RS5

Supertex inc. www.supertex.com Doc.# DSFP-CL8800 D031914 Pin Description Pin # Pin Name Description 1 - 8 GND Circuit common (use for heat sink ground plane pass through). 9 SET1 Current sense for linear current regulators for each tap. Resistors on these pins sets the tap currents. 10 NC No internal connection. 11 SET2 Current sense for linear current regulators for each tap. Resistors on these pins sets the tap currents. 12 NC No internal connection. 13 SET3 Current sense for linear current regulators for each tap. Resistors on these pins sets the tap currents. 14 NC No internal connection. 15 SET4 Current sense for linear current regulators for each tap. Resistors on these pins sets the tap currents. 16 NC No internal connection. 17 SET5 Current sense for linear current regulators for each tap. Resistors on these pins sets the tap currents. 18 SET6 Current sense for linear current regulators for each tap. Resistors on these pins sets the tap currents. 19 - 20 GND Circuit common (use for heat sink ground plane pass through). 21 GND Circuit common. Connect to bridge rectifier return (use for heat sink ground plane pass through). 22 - 26 GND Circuit common (use for heat sink ground plane pass through).

27 TAP6

Current regulator outputs. Connect to taps along the LED string.

28 TAP5

29 TAP4

30 TAP3

31 TAP2

32 TAP1

33 BIAS Provides bias for driver. Connect to rectified AC. Underside plate (GND) For heatsinking purposes, it should be soldered to a 4.0cm2 exposed copper area. It should also be electrically connected to circuit common (GND). Note: The high voltage pins are located on one side of the package and are arranged from lowest voltage to highest. Pin-to-pin voltage gradients are mini- mized.

Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such appl ications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liabilit y to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) ©2014 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Supertex inc.

1235 Bordeaux Drive, Sunnyvale, CA 94089

Tel: 408-222-8888 www.supertex.com (The package drawings in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) CL8800 Doc.# DSFP-CL8800 D031914 33-Lead QFN Package Outline (K6) 6.00x6.00mm body, 1.00mm height (max), 0.50mm pitch Notes: 1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. 2. Depending on the method of manufacturing, a maximum of 0.15mm pullback (L1) may be present. 3. The inner tip of the lead may be either rounded or square. 4. There will be an exposed DAP. A minimum of 0.7mm spacing will be maintained between the leads and the DAP. Seating Plane Top View Side View Bottom View D E E2 View B View B Note 3 Note 2 Note 1 (Index Area D/2 x E/2) 33 D2 0.70mm (min) Note 4 e b L θ A Note 1 (Index Area D/2 x E/2) Symbol A A1 A3 b D D2 E E2 e L L1 θO Dimension (mm) MIN 0.80 0.00 0.20 REF 0.50 BSC 0.30 0.00 0 Drawings not to scale. Supertex Doc. #: DSPD-33QFNK636X6P050, Version A021312.