CL7

CL7 SUTEX | Alldatasheet

Document overview

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Technical content

Features

100mA ±5% constant current drive Built-in reverse polarity protection Logic level enable Dimmable via EN pin Overtemperature protection 90V max rating for transient immunity

Applications

This device is not rated for automotive applications!

Ordering Information

-G indicates package is RoHS compliant (‘Green’) Absolute Maximum Ratings Supply voltage, VDD -25V to +100V Output voltage, VOUT -25V to +100V Enable voltage, VEN -0.5V to +6.5V Operating junction temperature -40°C 1 Storage temperature -65°C to +150°C Symbol Parameter Min Typ Max Units Conditions Thermal Characteristics (Guaranteed by design – not production tested ) Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. 1. Maximum junction temperature internally limited. Pin Confi gurations GND GND GND GND EN V DD OUT NC Underside plate is GND Power SO-8 IOUT vs Temperature 250-25-50 50 75 100 125 Temperature (OC) IOUT (Normalized) 1.00 0.95 0.90 0.85 1.05 Pin Name Description VDD VDD Supply voltage for the CL7 OUT Output Connect the LED between this pin and the supply voltage GND Ground Circuit common EN Enable Active low enable input - this input has an internal 100kΩ pull-down resistance θj-a Thermal resistance, junction to ambient Power SO-8 - 67 - OC/W Soldered to 2cm 2 exposed copper area TLIM Overtemperature limit 120 135 150 OC --- THYS Overtemperature hysteresis - 30 - OC --- Pin Designation Symbol Parameter Min Typ Max Units Conditions Recommended Operating Conditions (all voltages with respect to GND pin) VDD Supply voltage Normal Extended 6.5 6.5 - 28

90 V ---

VOUT Voltage at OUT pin1 Normal Extended 4.0 4.0 - 28 TJ Junction temperature2 -40 - 119 oC --- 1. Continuous operation at high VOUT voltages may result in activation of overtemperature protection. Use appropriate heatsinking. 2. Maximum junction temperature internally limited.

Symbol Parameter Min Typ Max Units Conditions Electrical Characteristics (Over normal recommended operating conditions unless otherwise specifi ed. All voltages with respect to GND pin. Production tested @ 25OC.) IDD Current into VDD pin 3.0 5.0 10 mA --- IOUT Current into OUT pin1 100 100 105 110 120 mA Normal conditions, 25°C Normal conditions, full temp Extended conditions IOUT(OFF) Current into OUT pin with VDD pin open or EN=1 - - 10 µA V DD = open VEN(ON) Enable voltage, on - - 0.8 V --- VEN(OFF) Enable voltage, off 2.4 - - V --- REN Enable pull-down resistance - 100 - kΩ --- VOFF Voltage at VDD to shut off LED current --1 V I OUT < 10µA tON On delay, EN to OUT - 3.0 - µs EN = 0V tOFF Off delay, EN to OUT - 0.1 - µs EN = 5V tRISE Current rise time, EN to OUT - 4.0 - µs EN = 0V tFALL Current fall time, EN to OUT - 0.3 - µs EN = 5V tON tRISE tFAL L 10% 90% tOFF EN IOUT Timing Application Circuits Control VDD OUT GND EN VIN EN = 0: 107.5mA EN = 1: 7.5mA 100kΩ Minimum VIN is increased by LED drop. Control VDD OUT GND EN VIN (1-D) • 100mA 100kΩ PWM signal D is the portion of time the PWM signal is high. PWM Dimming 2-Level LED Circuit CL7 CL7

Doc.# DSFP-CL7 NR021407 CL7 (The package drawing(s) in this data sheet may not refl ect the most current specifi cations. For the latest package outline information go to http://www.supertex.com/packaging.html.) 8-Lead SOIC (Narrow Body w/Heat Slug) Package Outline (SG) 4.90x3.90mm body, 1.70mm height (max), 1.27mm pitch Symbol A A1 A2 b D D1 E E1 E2 e h L L1 L2 θ θ1 Dimension (mm) 1.27 BSC 0.25 0.40 1.04 REF 0.25 BSC 0O 5O JEDEC Registration MS-012, Variation BA, Issue E, Sept. 2005. Dimensions marked with (*) are non-JEDEC dimensions. Drawings not to scale. D Seating Plane Gauge Plane L Top View Side View View A-A View B View B θ E1 E A A2 A A Seating Plane e b h h Bottom View Exposed Thermal Pad Zone Note 1 Note 1 (Index Area D/2 x E1/2) Note 1: This chamfer feature is optional. If it is not present, then a Pin 1 identifi er must be located in the index area indicated.The Pin 1 identifi er may be either a mold, or an embedded metal or marked feature.