AN0332 SUTEX | Alldatasheet

Document overview

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Technical content

Features

Low drain to source leakage Interfaces directly to TTL and CMOS logic 8 independent channels Low crosstalk between channels Low power dissipation Freedom from secondary breakdown Serial data input On-chip decoder, latch with reset and write disable circuitry Absolute Maximum Ratings1 Output voltage, VDD 320V Logic supply voltage, VDD -0.5V to +15V Logic input levels, all inputs -0.5V to V DD Operating and storage temperature range -55 °C to +150°C Soldering temperature 2 300°C Channel-to-channel crosstalk 10mV/V Notes: 1. All voltages are referenced to V SS. 2. Distance of 1.6mm from case for 10 seconds.

Applications

High impedance/low leakage measurements for bare board testers High voltage piezoelectric transducer drivers High voltage electroluminescent panel drivers High voltage electrostatic array drivers General multi-channel driver arrays Pin Configuration Q7 VDD Reset Q 6 Data Q 5 Write Dis Q 4 A0 Q3 A1 Q2 A2 Q1 VSS Q0 Note: See Package Outline section for dimensions. SO-16 top view – OBSOLETE –

Symbol Parameter Min Typ Max Unit Conditions IO(OFF) Off-State Output Current 8.0 nA V O = max. rating, 8 outputs connected in parallel IO(ON) On-State Output Current 25 mA V O = 25V RO(ON) On-State Output Resistance 350 Ω IO = 10mA ∆RO(ON) Change in RO(ON) with High Temperature 0.8 %/ °CI O = 10mA IDDQ Quiescent Logic Supply Current 0.05 16.5 µA VIL Input Low Voltage 3.5 V VIH Input High Voltage 12 V IIN Input Current 1.0 µA Note: 1. All voltages are referenced to V SS. Electrical Characteristics (@ 25°C and VDD = 12V unless otherwise specified) DC Characteristics Symbol Parameter Min Typ Max Unit Fig. 1* Conditions tD(ON) Turn-On Delay Time 800 ns 1a tD(OFF) Turn-Off Delay Time 800 ns 1b tr Rise Time 200 ns 10 tf Fall Time 200 ns 11 tPHL, tPLH Propagation Delay Time 87 ns 2 V O = 25V, IO = 10mA from Write Disable to Output tPHL, tPLH Propagation Delay Time 87 ns 3 from Reset to Output tPHL, tPLH Propagation Delay Time 107 ns 9 from Address to Output tW Minimum Pulse Width – Data 50 100 ns 4 tW Minimum Pulse Width – Address 100 200 ns 8 tW Minimum Pulse Width – Reset 40 75 ns 5 tS Setup Time – Data to Write Disable 50 ns 6 tH Hold Time – Data to Write Disable\` 75 ns 7 CIN Input capacitance – Any Input 5.0 7.5 pF *Refer to circled numbers on Timing Diagram (Figure 1). Note: 1. All voltages are referenced to V SS. AC Characteristics AN0332 – OBSOLETE –

A0, A1, A2 56 7 1a11 101b Write Disable Data Reset tW tP tP tR tW tP VSS VDD tf 10% 10% 90% td(ON) td(OFF) 10% tHtStW Q0 OFF Q0 ON Q7 OFF Q7 ON 90% 90% 90% Symbol Parameter V DD Min Max Unit VDD Logic supply voltage 10.0 13.2 V VO Output Voltage referenced to VSS 0 320 V VIH Input High Voltage 12V V DD - 2 V DD V VIL Input Low Voltage 12V 0 2.0 V TA Operating Free-Air Temperature 0 70 °C Note: 1. All voltages are referenced to VSS. Recommended Operating Conditions (For maximum reliability, nominal operating conditons should be selected so that operation is always within the following ranges.) AN0332 Data Write Disable Reset Addressed Output Unaddressed Outputs HL LO n Holdspriv. L Off HH L Holdspriv. Holdspriv. L HLH O n Off L Off HHH O f f Off L Mode Selection Timing Diagram Figure 1 – OBSOLETE –

VDD (+) Reset VSS (–) S Latch Latch Latch Latch Latch Latch Latch Latch 3:8 Decoder Write Disable Data Functional Block Diagram AN0332 – OBSOLETE –