4406A

AO4406A AOSMD | Alldatasheet

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General Description Product Summary VDS I D (at V GS =10V) 13A R DS(ON) (at V GS =10V) < 11.5m Ω R DS(ON) (at V GS = 4.5V) < 15.5m Ω 100% UIS Tested 100% R g Tested Symbol VDS The AO4406A uses advanced trench technology to provide excellent R DS(ON) with low gate charge. This device is suitable for high side switch in SMPS and general purpose applications. V Maximum Units Parameter Absolute Maximum Ratings T A=25° C unless otherwise noted 30V Drain-Source Voltage 30 G D S SOIC-8 Top View Bottom View D D D D S S S G VDS VGS IDM IAS EAS TJ, T STG Symbol t ≤ 10s Steady-State Steady-State R θJL Maximum Junction-to-Lead ° C/W ° C/W Maximum Junction-to-Ambient A D T A=25° C TA=70° C Power Dissipation B PD Avalanche energy L=0.1mH C Pulsed Drain Current C Continuous Drain Current T A=25° C V Maximum Junction-to-Ambient A V±20 Gate-Source Voltage Drain-Source Voltage 30 mJ Avalanche Current C A22 A ID 10.4 100 ° C/W R θJA Thermal Characteristics W3.1 Units Parameter Typ Max A=70° C Junction and Storage Temperature Range -55 to 150 ° C Rev 2: Nov. 2011 www.aosmd.com Page 1 of 6

VDS =30V, V GS =0V 1 TJ=55° C 5 IGSS ±100 nA VGS(th) Gate Threshold Voltage 1.5 1.9 2.5 V ID(ON) 100 A 9.5 11.5 TJ=125° C 14 17 12.5 15.5 m Ω gFS 45 S VSD 0.75 1 V IS 4 A C iss 610 760 910 pF C oss 88 125 160 pF C rss 40 70 100 pF R g 0.8 1.6 2.4 Ω Q g(10V) 11 14 17 nC Q g(4.5V) 5 6.6 8 nC Q gs 1.9 2.4 2.9 nC Q gd 1.8 3 4.2 nC tD(on) 4.4 ns t 9 ns VGS =0V, V DS =15V, f=1MHz SWITCHING PARAMETERS Electrical Characteristics (T J=25° C unless otherwise noted) STATIC PARAMETERS Parameter Conditions Drain-Source Breakdown Voltage ID =250 µA, V GS =0V VGS =10V, V DS =5V VGS =10V, I D =12A R DS(ON) Static Drain-Source On-Resistance IDSS Gate resistance VGS =0V, V DS =0V, f=1MHz µA VDS =V GS ID =250 µA VDS =0V, V GS =±20V Zero Gate Voltage Drain Current Gate-Body leakage current m Ω On state drain current Reverse Transfer Capacitance I S=1A,V GS =0V VDS =5V, I D =12A VGS =4.5V, I D =10A Forward Transconductance Diode Forward Voltage Maximum Body-Diode Continuous Current Input Capacitance Output Capacitance Turn-On DelayTime DYNAMIC PARAMETERS Turn-On Rise Time V =10V, V =15V, R =1.25 Ω , Total Gate Charge VGS =10V, V DS =15V, I D =12A Gate Source Charge Gate Drain Charge Total Gate Charge tr 9 ns tD(off) 17 ns tf 6 ns trr 5.6 7 8 ns Q rr 6.4 8 9.6 nC THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR TH E CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE N OT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY AR ISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE. IF=12A, dI/dt=500A/ µsBody Diode Reverse Recovery Time Body Diode Reverse Recovery Charge I F=12A, dI/dt=500A/ µs Turn-On Rise Time Turn-Off DelayTime VGS =10V, V DS =15V, R L=1.25 Ω , R GEN =3 Ω Turn-Off Fall Time A. The value of R θJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25 °C. The value in any given application depends on the user's specific board design. B. The power dissipation P D is based on T J(MAX) =150 °C, using ≤ 10s junction-to-ambient thermal resistance. C. Repetitive rating, pulse width limited by junction temperature T J(MAX) =150 °C. Ratings are based on low frequency and duty cycles to keep initialT J=25 °C. D. The R θJA is the sum of the thermal impedence from junction to lead R θJL and lead to ambient. E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max. F. These curves are based on the junction-to-ambient thermal impedence which is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, assuming a maximum junction temperature of T J(MAX) =150 °C. The SOA curve provides a single pulse rating. Rev 2: Nov. 2011 www.aosmd.com Page 2 of 6

TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 0.001 0.01 0.1 ZθθθθJA Normalized Transient Thermal Resistance Pulse Width (s) Figure 12: Normalized Maximum Transient Thermal Impedance (Note F) Single Pulse D=T on /T TJ,PK =T A+P DM .Z θJA .R θJA Ton T PD In descending order R θJA =75 °C/W Rev 2: Nov. 2011 www.aosmd.com Page 5 of 6

Gate Charge Test Circuit & Waveform VDC DUT Vdd Vgs Vds Vgs RL Rg Vgs Vds 10% 90% Resistive Switching Test Circuit & Waveforms t t rd(on) ton td(off) tf toff Id L Vds BV Unclamped Inductive Switching (UIS) Test Circuit & Waveforms Vds DSS E = 1/2 LI AR AR Vdd Vgs Vgs Rg DUT VDC Vgs Id Vgs I Ig Vgs VDC DUT L Vgs Vds Isd Isd Diode Recovery Test Circuit & Waveforms Vds - Vds + IF AR dI/dt IRM rr Vdd Vdd Q = - Idt trr Rev 2: Nov. 2011 www.aosmd.com Page 6 of 6