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Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 5
Technical content
Features
- Pb−Free, Halogen Free and RoHS compliant.
- Low RDS(on) to Minimize Conduction Losses.
- Ohmic Region Good RDS(on) Ratio.
- Optimized Gate Charge to Minimize Switching Losses.
Applications
- Protection Circuits Applications.
- Logic/Load Switch Circuits Applications. ABSOLUTE MAXIMUM RATINGS (T A = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL LIMITS UNITS Drain-Source Voltage V DS -40 V Gate-Source Voltage V GS ±25 V Continuous Drain Current4 TC = 25 °C ID -74 A TC = 100 °C -46 TA = 25 °C -12 TA = 70 °C -9.6 Pulsed Drain Current1 I DM -100 Avalanche Current I AS -49.8 Avalanche Energy L = 0.1mH E AS 124 mJ Power Dissipation3 TC = 25 °C PD W TC = 100 °C 33 TA = 25 °C 2.2 TA = 70 °C 1.4 Operating Junction & Storage Temperature Range T j, Tstg -55 to 150 °C PRODUCT SUMMARY V(BR)DSS R DS(ON) I D -40V 8mΩ -74A G. GATE D. DRAIN S. SOURCE
P-Channel Logic Level Enhancement Mode Field Effect Transistor PK5B3BA P D F N 5 x 6 P Halogen-Free & Lead-Free NIKO-SEM G-35-1 REV1.0 THERMAL RESISTANCE RATINGS THERMAL RESISTANCE SYMBOL TYPICAL MAXIMUM UNITS Junction-to-Ambient2 t ≦10s RJA 35 °C / W Junction-to-Ambient2 Steady-State RJA 56 Junction-to-Case Steady-State RJC 1.5 1Pulse width limited by maximum junction temperature. 2The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25° C. The value in any given application depends on the user's specific board design. 3The Power dissipation is based on RJA t ≦10s value. 4Package limitation current is -51A. ELECTRICAL CHARACTERISTICS (TJ = 25 °C, Unless Otherwise Noted) PARAMETER SYMBOL TEST CONDITIONS LIMITS UNIT MIN TYP MAX STATIC Drain-Source Breakdown Voltage V (BR)DSS VGS = 0V, ID = -250A -40 V Gate Threshold Voltage V GS(th) VDS = VGS, ID = -250A -1 -1.6 -3 Gate-Body Leakage I GSS V DS = 0V, VGS = ±25V ±100 nA Zero Gate Voltage Drain Current I DSS VDS = -32V, VGS = 0V -1 uAVDS = -30V, VGS = 0V, TJ = 125 °C -10 Drain-Source On-State Resistance1 RDS(ON) VGS = -10V, ID = -20A 6.2 8 mΩ VGS = -4.5V, ID = -15A 8.4 14 Forward Transconductance1 g fs V DS = -5V, ID = -20A 60 S DYNAMIC Input Capacitance C iss VGS = 0V, VDS = -20V, f = 1MHz 3933 pFOutput Capacitance C oss 507 Reverse Transfer Capacitance C rss 451 Gate Resistance Rg V GS = 0V, VDS = 0V, f = 1MHz 3.5 Ω Total Gate Charge2 Q g VDS = -20V, VGS = -10V , ID = -20A nCGate-Source Charge2 Q gs 10 Gate-Drain Charge2 Q gd 20 Turn-On Delay Time2 t d(on) VDS = -20V, ID -20A, VGS = -10V, RGS = 6Ω nS Rise Time2 t r 45 Turn-Off Delay Time2 t d(off) 173 Fall Time2 t f 122
P-Channel Logic Level Enhancement Mode Field Effect Transistor PK5B3BA P D F N 5 x 6 P Halogen-Free & Lead-Free NIKO-SEM G-35-1 REV1.0 SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TJ = 25 °C) Continuous Current3 I S -63 A Forward Voltage1 V SD I F = -20A, VGS = 0V -1.3 V Reverse Recovery Time t rr IF = -20A , dlF/dt = 100 A / S 31 nS Reverse Recovery Charge Q rr 12 nC 1Pulse test : Pulse Width 300 sec, Duty Cycle 2％. 2Independent of operating temperature. 3Package limitation current is -51A.
P-Channel Logic Level Enhancement Mode Field Effect Transistor PK5B3BA P D F N 5 x 6 P Halogen-Free & Lead-Free NIKO-SEM G-35-1 REV1.0 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 -50 -25 0 25 50 75 100 125 150 VGS=-10V ID=-20A CISS COSS CRSS 1000 2000 3000 4000 5000 0 5 10 15 20 25 30 25℃ 125℃ -20℃ 012345 0.008 0.016 0.024 0.032 0.04 2468 1 0 ID=-20A 0.003 0.006 0.009 0.012 0.015 0 6 12 18 24 30 VGS=-10V VGS=-4.5V 0123456 VGS=-10V VGS=-9V VGS=-8V VGS=-7V VGS=-6V VGS=-5V VGS=-4.5V VGS=-2.5V VGS=-2.7V Output Characteristics -ID, Drain-To-Source Current(A) Transfer Characteristics -ID, Drain-To-Source Current(A) -VGS, Gate-To-Source Voltage(V) -VDS, Drain-To-Source Voltage(V) Normalized Drain to Source ON-Resistance TJ , Junction Temperature(˚C) Capacitance Characteristic C , Capacitance(pF) -VDS, Drain-To-Source Voltage(V) On-Resistance VS Temperature On-Resistance VS Gate-To-Source RDS(ON)ON-Resistance(OHM) -VGS, Gate-To-Source Voltage(V) On-Resistance VS Drain Current RDS(ON)ON-Resistance(OHM) -ID , Drain-To-Source Current(A)
P-Channel Logic Level Enhancement Mode Field Effect Transistor PK5B3BA P D F N 5 x 6 P Halogen-Free & Lead-Free NIKO-SEM G-35-1 REV1.0 DC 100ms 10ms 1ms 0.01 0.1 100 1000 0.1 1 10 100 NOTE : 1.VGS = -10V 2.TA =25˚C 3.RθJA = 56˚C/W 4.Single Pulse Operation in This Area is Limited by RDS(ON) 120 0.001 0.01 0.1 1 10 100 Single Pulse RθJA = 56˚C/W TA = 25˚C 25℃125℃ 100 0 2 04 06 08 0 1 0 0 VDS=-20V ID=-20A Gate charge Characteristics Qg , Total Gate Charge(nC) -VGS , Gate-To-Source Voltage(V) Source-Drain Diode Forward Voltage -VSD, Source-To-Drain Voltage(V) -IS , Source Current(A) Safe Operating Area Single Pu lse Maximum Power Dissipation -ID , Drain Current(A) Power(W) Single Pulse Time(s) -VDS, Drain-To-Source Voltage(V) Transient Thermal Response Curve r(t) , Normalized Effective Transient Thermal Resistance T1 , Square Wave Pulse Duration[sec] single pulse Duty cycle=0.5 0.2 0.1 0.05 0.02 0.01 0.01 0.1 0.0001 0.001 0.01 0.1 1 10 100 Notes 1.Duty cycle, D= t1 / t2 2.RthJA = 56 ℃/W 3.TJ-TA = P*RthJA(t) 4.RthJA(t) = r(t)*RthJA