DATASHEET SEARCH SITE | WWW.ALLDATASHEET.COM

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 5

Technical content

Features

  • Pb−Free, Halogen Free and RoHS compliant.
  • Low RDS(on) to Minimize Conduction Losses.
  • Ohmic Region Good RDS(on) Ratio.
  • Optimized Gate Charge to Minimize Switching Losses.

Applications

  • Protection Circuits Applications.
  • Logic/Load Switch Circuits Applications. ABSOLUTE MAXIMUM RATINGS (T A = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL LIMITS UNITS Drain-Source Voltage V DS -20 V Gate-Source Voltage V GS ±8 V Continuous Drain Current TC = 25 °C ID -48 A TC = 100 °C -30 TA = 25 °C -18 TA = 70 °C -14.5 Pulsed Drain Current1 I DM -100 Avalanche Current I AS -39 Avalanche Energy L = 0.1mH E AS 76 mJ Power Dissipation3 TC = 25 °C PD W TC = 100 °C 10 TA = 25 °C 3.5 TA = 70 °C 2.2 Operating Junction & Storage Temperature Range T j, Tstg -55 to 150 °C PRODUCT SUMMARY V(BR)DSS R DS(ON) I D -20V 6 mΩ -48A G. GATE D. DRAIN S. SOURCE

P-Channel Logic Level Enhancement Mode Field Effect Transistor PK5A1BA P D F N 5 x 6 P Halogen-Free & Lead-Free NIKO-SEM F-36-5 REV1.0 THERMAL RESISTANCE RATINGS THERMAL RESISTANCE SYMBOL TYPICAL MAXIMUM UNITS Junction-to-Ambient2 t ≦10s RJA 35 °C / W Junction-to-Ambient2 Steady-State RJA 52 Junction-to-Case Steady-State RJC 5 1Pulse width limited by maximum junction temperature. 2The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25° C. The value in any given application depends on the user's specific board design. 3The Power dissipation is based on RJA t ≦10s value. ELECTRICAL CHARACTERISTICS (TJ = 25 °C, Unless Otherwise Noted) PARAMETER SYMBOL TEST CONDITIONS LIMITS UNIT MIN TYP MAX STATIC Drain-Source Breakdown Voltage V (BR)DSS VGS = 0V, ID = -250A -20 V Gate Threshold Voltage V GS(th) VDS = VGS, ID = -250A -0.45 -0.6 -0.9 Gate-Body Leakage I GSS V DS = 0V, VGS = ±8V ±100 nA Zero Gate Voltage Drain Current I DSS VDS = -16V, VGS = 0V -1 uAVDS = -10V, VGS = 0V, TJ = 125 °C -10 Drain-Source On-State Resistance1 RDS(ON) mΩ Forward Transconductance1 g fs V DS = -5V, ID = -3.5A 43 S DYNAMIC Input Capacitance C iss VGS = 0V, VDS = -10V, f = 1MHz 5731 pFOutput Capacitance C oss 542 Reverse Transfer Capacitance C rss 420 Gate Resistance Rg V GS = 0V, VDS = 0V, f = 1MHz 3 Ω Total Gate Charge2 Q g VDS = -10V, VGS = -4.5V , ID = -3.5A nCGate-Source Charge2 Q gs 6.5 Gate-Drain Charge2 Q gd 11.2 Turn-On Delay Time2 t d(on) VDS = -10V, ID  -3.5A, VGS = -4.5V, RGS = 6Ω nS Rise Time2 t r 53 Turn-Off Delay Time2 t d(off) 187 Fall Time2 t f 105

P-Channel Logic Level Enhancement Mode Field Effect Transistor PK5A1BA P D F N 5 x 6 P Halogen-Free & Lead-Free NIKO-SEM F-36-5 REV1.0 SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TJ = 25 °C) Continuous Current I S -19 A Forward Voltage1 V SD I F = -3.5A, VGS = 0V -1.3 V Reverse Recovery Time t rr IF = -3.5A , dlF/dt = 100 A / S 41 nS Reverse Recovery Charge Q rr 26 nC 1Pulse test : Pulse Width  300 sec, Duty Cycle  2%. 2Independent of operating temperature.

P-Channel Logic Level Enhancement Mode Field Effect Transistor PK5A1BA P D F N 5 x 6 P Halogen-Free & Lead-Free NIKO-SEM F-36-5 REV1.0 25℃ 125℃ -20℃ 0 0.6 1.2 1.8 2.4 3 CISS COSS CRSS 1000 2000 3000 4000 5000 6000 7000 0 5 10 15 20 25 30 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 -50 -25 0 25 50 75 100 125 150 VGS=-4.5V ID=-3.5A 0.004 0.008 0.012 0.016 0.02 012345 ID=-3.5A 012345 VGS=-4.5V VGS=-2.5V VGS=-1.8V VGS=-1.4V VGS=-1.3V VGS=-1.2V VGS=-1.1V 0.002 0.004 0.006 0.008 0.01 0 4 8 12 16 20 VGS=-4.5V VGS=-2.5V Output Characteristics -ID, Drain-To-Source Current(A) Transfer Characteristics -ID, Drain-To-Source Current(A) -VGS, Gate-To-Source Voltage(V) -VDS, Drain-To-Source Voltage(V) Normalized Drain to Source ON-Resistance TJ , Junction Temperature(˚C) Capacitance Characteristic C , Capacitance(pF) -VDS, Drain-To-Source Voltage(V) On-Resistance VS Temperature On-Resistance VS Gate-To-Source RDS(ON)ON-Resistance(OHM) -VGS, Gate-To-Source Voltage(V) On-Resistance VS Drain Current RDS(ON)ON-Resistance(OHM) -ID , Drain-To-Source Current(A)

P-Channel Logic Level Enhancement Mode Field Effect Transistor PK5A1BA P D F N 5 x 6 P Halogen-Free & Lead-Free NIKO-SEM F-36-5 REV1.0 DC 100ms 10ms 1ms 0.1 100 1000 0.1 1 10 100 NOTE : 1.VGS = -4.5V 2.Ta = 25˚C 3.RθJA = 52 ˚C/W 4.Single Pulse Operation in This Area is Limited by RDS(ON) 100 0.001 0.01 0.1 1 10 100 Single Pulse RθJA = 52 ˚C/W TA = 25˚C 0 1 32 63 95 26 5 VDS=-10V ID=-3.5A 25℃ 125℃ 100 Gate charge Characteristics Qg , Total Gate Charge(nC) -VGS , Gate-To-Source Voltage(V) Source-Drain Diode Forward Voltage -VSD, Source-To-Drain Voltage(V) -IS , Source Current(A) Safe Operating Area Single Pu lse Maximum Power Dissipation -ID , Drain Current(A) Power(W) Single Pulse Time(s) -VDS, Drain-To-Source Voltage(V) Transient Thermal Response Curve r(t) , Normalized Effective Transient Thermal Resistance T1 , Square Wave Pulse Duration[sec] single pulse Duty cycle=0.5 0.2 0.1 0.05 0.02 0.01 0.01 0.1 0.0001 0.001 0.01 0.1 1 10 100 Notes 1.Duty cycle, D= t1 / t2 2.RthJA = 52 ℃/W 3.TJ-TA = P*RthJA(t) 4.RthJA(t) = r(t)*RthJA